Mesa (master): gallium/tgsi_to_nir: Set nir_intrinsic_align_mul to 16 and offset to 0
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Tue Apr 14 19:09:32 UTC 2020
Module: Mesa
Branch: master
Commit: cb08f451d01571e0a570e99553624ae7b0d3d075
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cb08f451d01571e0a570e99553624ae7b0d3d075
Author: Gert Wollny <gert.wollny at collabora.com>
Date: Mon Apr 13 19:51:42 2020 +0200
gallium/tgsi_to_nir: Set nir_intrinsic_align_mul to 16 and offset to 0
Since the alignment is now checked in the validator we must set it.
v2: Use alignement of 4, i.e. dest bit size by eight.
v3: Use alignment 16 (Rhys Perry & Jason Ekstand)
v4: Use nir_intrinsic_set_align to make it clear that align offset is 0
(Jason)
Fixes: e78a7a182524f091e2d77ba97bfbe057c3975cab
nir: Assert memory loads are aligned
Signed-off-by: Gert Wollny <gert.wollny at collabora.com>
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4544>
---
src/gallium/auxiliary/nir/tgsi_to_nir.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/auxiliary/nir/tgsi_to_nir.c b/src/gallium/auxiliary/nir/tgsi_to_nir.c
index 6ac894c85bb..0b96a3e707d 100644
--- a/src/gallium/auxiliary/nir/tgsi_to_nir.c
+++ b/src/gallium/auxiliary/nir/tgsi_to_nir.c
@@ -736,6 +736,7 @@ ttn_src_for_file_and_index(struct ttn_compile *c, unsigned file, unsigned index,
}
/* UBO offsets are in bytes, but TGSI gives them to us in vec4's */
offset = nir_ishl(b, offset, nir_imm_int(b, 4));
+ nir_intrinsic_set_align(load, 16, 0);
} else {
nir_intrinsic_set_base(load, index);
if (indirect) {
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