Mesa (master): anv: Advertise SEND count through VK_EXT_pipeline_executable_properties

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Module: Mesa
Branch: master
Commit: b2e4157143439a211d2f8e761dc8afd750fa791d
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b2e4157143439a211d2f8e761dc8afd750fa791d

Author: Jason Ekstrand <jason at jlekstrand.net>
Date:   Fri Apr  3 13:09:41 2020 -0500

anv: Advertise SEND count through VK_EXT_pipeline_executable_properties

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4578>

---

 src/intel/compiler/brw_compiler.h         |  1 +
 src/intel/compiler/brw_fs_generator.cpp   |  1 +
 src/intel/compiler/brw_vec4_generator.cpp |  1 +
 src/intel/vulkan/anv_pipeline.c           | 10 ++++++++++
 4 files changed, 13 insertions(+)

diff --git a/src/intel/compiler/brw_compiler.h b/src/intel/compiler/brw_compiler.h
index 03512471d80..25fc3eaa915 100644
--- a/src/intel/compiler/brw_compiler.h
+++ b/src/intel/compiler/brw_compiler.h
@@ -1275,6 +1275,7 @@ DEFINE_PROG_DATA_DOWNCAST(sf)
 struct brw_compile_stats {
    uint32_t dispatch_width; /**< 0 for vec4 */
    uint32_t instructions;
+   uint32_t sends;
    uint32_t loops;
    uint32_t cycles;
    uint32_t spills;
diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp
index 3a2f2a9b7ce..8afc075f187 100644
--- a/src/intel/compiler/brw_fs_generator.cpp
+++ b/src/intel/compiler/brw_fs_generator.cpp
@@ -2492,6 +2492,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width,
    if (stats) {
       stats->dispatch_width = dispatch_width;
       stats->instructions = before_size / 16 - nop_count;
+      stats->sends = send_count;
       stats->loops = loop_count;
       stats->cycles = cfg->cycle_count;
       stats->spills = spill_count;
diff --git a/src/intel/compiler/brw_vec4_generator.cpp b/src/intel/compiler/brw_vec4_generator.cpp
index 5176ba99034..c247c988181 100644
--- a/src/intel/compiler/brw_vec4_generator.cpp
+++ b/src/intel/compiler/brw_vec4_generator.cpp
@@ -2242,6 +2242,7 @@ generate_code(struct brw_codegen *p,
    if (stats) {
       stats->dispatch_width = 0;
       stats->instructions = before_size / 16;
+      stats->sends = send_count;
       stats->loops = loop_count;
       stats->cycles = cfg->cycle_count;
       stats->spills = spill_count;
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index b4f6077f0b9..b85a37e7873 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -2188,6 +2188,16 @@ VkResult anv_GetPipelineExecutableStatisticsKHR(
       stat->value.u64 = exe->stats.instructions;
    }
 
+   vk_outarray_append(&out, stat) {
+      WRITE_STR(stat->name, "SEND Count");
+      WRITE_STR(stat->description,
+                "Number of instructions in the final generated shader "
+                "executable which access external units such as the "
+                "constant cache or the sampler.");
+      stat->format = VK_PIPELINE_EXECUTABLE_STATISTIC_FORMAT_UINT64_KHR;
+      stat->value.u64 = exe->stats.sends;
+   }
+
    vk_outarray_append(&out, stat) {
       WRITE_STR(stat->name, "Loop Count");
       WRITE_STR(stat->description,