Mesa (master): radv: align buffer descriptor sizes to dword

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Module: Mesa
Branch: master
Commit: 51363bd4751c2f8e388c229fe91507a7a181517c
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=51363bd4751c2f8e388c229fe91507a7a181517c

Author: Rhys Perry <pendingchaos02 at gmail.com>
Date:   Fri Apr 10 14:25:46 2020 +0100

radv: align buffer descriptor sizes to dword

This is needed to prevent bounds checking issues when load 8/16-bit values
with dword loads.

Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>

---

 src/amd/vulkan/radv_constants.h      |  6 ++++--
 src/amd/vulkan/radv_descriptor_set.c | 12 ++++++++++++
 2 files changed, 16 insertions(+), 2 deletions(-)

diff --git a/src/amd/vulkan/radv_constants.h b/src/amd/vulkan/radv_constants.h
index a42984e83c6..b494e5c71e7 100644
--- a/src/amd/vulkan/radv_constants.h
+++ b/src/amd/vulkan/radv_constants.h
@@ -81,8 +81,10 @@
  */
 #define RADV_MAX_PER_SET_DESCRIPTORS ((1ull << 31 ) / 96)
 
-/* Our buffer size fields allow only this much */
-#define RADV_MAX_MEMORY_ALLOCATION_SIZE 0xFFFFFFFFull
+/* Our buffer size fields allow only 2**32 - 1. We round that down to a multiple
+ * of 4 bytes so we can align buffer sizes up.
+ */
+#define RADV_MAX_MEMORY_ALLOCATION_SIZE 0xFFFFFFFCull
 
 /* Number of invocations in each subgroup. */
 #define RADV_SUBGROUP_SIZE 64
diff --git a/src/amd/vulkan/radv_descriptor_set.c b/src/amd/vulkan/radv_descriptor_set.c
index ea3d733ba61..dff774ace69 100644
--- a/src/amd/vulkan/radv_descriptor_set.c
+++ b/src/amd/vulkan/radv_descriptor_set.c
@@ -851,6 +851,12 @@ static void write_buffer_descriptor(struct radv_device *device,
 	if (buffer_info->range == VK_WHOLE_SIZE)
 		range = buffer->size - buffer_info->offset;
 
+	/* robustBufferAccess is relaxed enough to allow this (in combination
+	 * with the alignment/size we return from vkGetBufferMemoryRequirements)
+	 * and this allows the shader compiler to create more efficient 8/16-bit
+	 * buffer accesses. */
+	range = align(range, 4);
+
 	va += buffer_info->offset + buffer->offset;
 	dst[0] = va;
 	dst[1] = S_008F04_BASE_ADDRESS_HI(va >> 32);
@@ -898,6 +904,12 @@ static void write_dynamic_buffer_descriptor(struct radv_device *device,
 	if (buffer_info->range == VK_WHOLE_SIZE)
 		size = buffer->size - buffer_info->offset;
 
+	/* robustBufferAccess is relaxed enough to allow this (in combination
+	 * with the alignment/size we return from vkGetBufferMemoryRequirements)
+	 * and this allows the shader compiler to create more efficient 8/16-bit
+	 * buffer accesses. */
+	size = align(size, 4);
+
 	va += buffer_info->offset + buffer->offset;
 	range->va = va;
 	range->size = size;