Mesa (refs/tags/chadv/cros-mesa-18.1_pre1-r4-vanilla): i965/gen10: Use CS Stall instead of WriteImmediate.

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Module: Mesa
Branch: refs/tags/chadv/cros-mesa-18.1_pre1-r4-vanilla
Commit: 131e871385b343467d3f8be0a8f3ccf09ab81075
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=131e871385b343467d3f8be0a8f3ccf09ab81075

Author: Rafael Antognolli <rafael.antognolli at intel.com>
Date:   Fri Jan 26 11:19:31 2018 -0800

i965/gen10: Use CS Stall instead of WriteImmediate.

Fixes: ca19ee33d7d39cb89d948b1c983763065975ce5b
Signed-off-by: Rafael Antognolli <rafael.antognolli at intel.com>
Cc: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

---

 src/mesa/drivers/dri/i965/brw_pipe_control.c | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_pipe_control.c b/src/mesa/drivers/dri/i965/brw_pipe_control.c
index eb8ada63129..e5b3ffe640c 100644
--- a/src/mesa/drivers/dri/i965/brw_pipe_control.c
+++ b/src/mesa/drivers/dri/i965/brw_pipe_control.c
@@ -353,12 +353,10 @@ gen7_emit_vs_workaround_flush(struct brw_context *brw)
 void
 gen10_emit_isp_disable(struct brw_context *brw)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
-
-   brw_emit_pipe_control_write(brw,
-                               PIPE_CONTROL_ISP_DIS |
-                               PIPE_CONTROL_WRITE_IMMEDIATE,
-                               brw->workaround_bo, 0, 0);
+   brw_emit_pipe_control(brw,
+                         PIPE_CONTROL_ISP_DIS |
+                         PIPE_CONTROL_CS_STALL,
+                         NULL, 0, 0);
 
    brw->vs.base.push_constants_dirty = true;
    brw->tcs.base.push_constants_dirty = true;