Mesa (master): freedreno/ir3: Drop redundant IR3_REG_HALF setup in ALU ops.

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Module: Mesa
Branch: master
Commit: 769adc9546afcd72cbe7bb1caf14add5f6ac9f61
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=769adc9546afcd72cbe7bb1caf14add5f6ac9f61

Author: Eric Anholt <eric at anholt.net>
Date:   Fri Apr 10 21:54:58 2020 -0700

freedreno/ir3: Drop redundant IR3_REG_HALF setup in ALU ops.

It's set by ir3_put_dst() immediately after.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4518>

---

 src/freedreno/ir3/ir3_compiler_nir.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c
index 1ada43f4ea6..2027fb88c7d 100644
--- a/src/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/freedreno/ir3/ir3_compiler_nir.c
@@ -733,12 +733,6 @@ emit_alu(struct ir3_context *ctx, nir_alu_instr *alu)
 		dst[0] = ir3_n2b(b, dst[0]);
 	}
 
-	if (nir_dest_bit_size(alu->dest.dest) < 32) {
-		for (unsigned i = 0; i < dst_sz; i++) {
-			dst[i]->regs[0]->flags |= IR3_REG_HALF;
-		}
-	}
-
 	ir3_put_dst(ctx, &alu->dest.dest);
 }