Mesa (master): amd: Swap from nir_opt_shrink_load() to nir_opt_shrink_vectors().
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Mon Aug 3 21:48:10 UTC 2020
Module: Mesa
Branch: master
Commit: d8c2f896dba8b5e89f054dc9f6bffd27e3aceb25
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d8c2f896dba8b5e89f054dc9f6bffd27e3aceb25
Author: Eric Anholt <eric at anholt.net>
Date: Wed Jul 22 22:00:57 2020 -0700
amd: Swap from nir_opt_shrink_load() to nir_opt_shrink_vectors().
This should do much more trimming than shrink_load, and is a win on i965's
vec4 and nir-to-tgsi. For scalar backends like this that don't need ALU
shrinking, it still gets more load intrinsics covered.
Reviewed-by: Rhys Perry <pendingchaos02 at gmail.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6050>
---
src/amd/compiler/aco_instruction_selection_setup.cpp | 3 ++-
src/amd/vulkan/radv_shader.c | 2 +-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/amd/compiler/aco_instruction_selection_setup.cpp b/src/amd/compiler/aco_instruction_selection_setup.cpp
index d5e5eb47574..799797f3e35 100644
--- a/src/amd/compiler/aco_instruction_selection_setup.cpp
+++ b/src/amd/compiler/aco_instruction_selection_setup.cpp
@@ -1344,6 +1344,8 @@ setup_nir(isel_context *ctx, nir_shader *nir)
if (nir->info.stage != MESA_SHADER_COMPUTE)
nir_lower_io(nir, (nir_variable_mode)(nir_var_shader_in | nir_var_shader_out), type_size, (nir_lower_io_options)0);
+ lower_to_scalar |= nir_opt_shrink_vectors(nir);
+
if (lower_to_scalar)
nir_lower_alu_to_scalar(nir, NULL, NULL);
if (lower_pack)
@@ -1385,7 +1387,6 @@ setup_nir(isel_context *ctx, nir_shader *nir)
/* cleanup passes */
nir_lower_load_const_to_scalar(nir);
- nir_opt_shrink_load(nir);
nir_move_options move_opts = (nir_move_options)(
nir_move_const_undef | nir_move_load_ubo | nir_move_load_input |
nir_move_comparisons | nir_move_copies);
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index e499e6ea234..e2792608051 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -284,7 +284,7 @@ radv_optimize_nir(struct nir_shader *shader, bool optimize_conservatively,
} while (progress && !optimize_conservatively);
NIR_PASS(progress, shader, nir_opt_conditional_discard);
- NIR_PASS(progress, shader, nir_opt_shrink_load);
+ NIR_PASS(progress, shader, nir_opt_shrink_vectors);
NIR_PASS(progress, shader, nir_opt_move, nir_move_load_ubo);
}
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