Mesa (master): radeonsi: various fixes for gfx10.3

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Module: Mesa
Branch: master
Commit: 0cdd411b6d78d15e8bc54e1ce5c3493cdbcadc1d
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0cdd411b6d78d15e8bc54e1ce5c3493cdbcadc1d

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Thu Jul 30 05:27:47 2020 -0400

radeonsi: various fixes for gfx10.3

The magic numbers fix sample shading.
The bypass flag is optional.

Fixes: a23802bcb9a - ac,radeonsi: start adding support for gfx10.3

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6137>

---

 src/gallium/drivers/radeonsi/si_state.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 3637bc0dfb1..3071d753be2 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -763,6 +763,7 @@ static void si_emit_clip_regs(struct si_context *sctx)
    unsigned initial_cdw = sctx->gfx_cs->current.cdw;
    unsigned pa_cl_cntl = S_02881C_VS_OUT_CCDIST0_VEC_ENA((total_mask & 0x0F) != 0) |
                          S_02881C_VS_OUT_CCDIST1_VEC_ENA((total_mask & 0xF0) != 0) |
+                         S_02881C_BYPASS_VTX_RATE_COMBINER_GFX103(sctx->chip_class >= GFX10_3) |
                          S_02881C_BYPASS_PRIM_RATE_COMBINER_GFX103(sctx->chip_class >= GFX10_3) |
                          clipdist_mask | (culldist_mask << 8);
 
@@ -5353,6 +5354,7 @@ void si_init_cs_preamble_state(struct si_context *sctx, bool uses_reg_shadowing)
 
    if (sctx->chip_class >= GFX10_3) {
       si_pm4_set_reg(pm4, R_028750_SX_PS_DOWNCONVERT_CONTROL_GFX103, 0xff);
+      si_pm4_set_reg(pm4, 0x28848, 1 << 9); /* This fixes sample shading. */
    }
 
    sctx->cs_preamble_state = pm4;