Mesa (staging/20.2): nir: Fix i64tof32 lowering

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Module: Mesa
Branch: staging/20.2
Commit: 8cdfbd3a07004d96e6480adbd7e0bfb8da7a43f6
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8cdfbd3a07004d96e6480adbd7e0bfb8da7a43f6

Author: Boris Brezillon <boris.brezillon at collabora.com>
Date:   Wed Aug 12 14:28:48 2020 +0200

nir: Fix i64tof32 lowering

The round-to-nearest-even implementation found in lower_2f() is incorrect
for any value having a significand that is not directly representable
and whose non-representable part lies between 1 and half the minimum
representable value. In this case, the significand is rounded up instead
of being rounded down.

Fixes: 936c58c8fcce ("nir: Extend nir_lower_int64() to support i2f/f2i lowering")
Signed-off-by: Boris Brezillon <boris.brezillon at collabora.com>
Tested-by: Jesse Natalie <jenatali at microsoft.com>
Acked-by: Matt Turner <mattst88 at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6290>
(cherry picked from commit 199bea0fd80e65178a9d12c705a9f0aaf0a36ceb)

---

 .pick_status.json                  |  2 +-
 src/compiler/nir/nir_lower_int64.c | 47 +++++++++++++++++---------------------
 2 files changed, 22 insertions(+), 27 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index 7bf5bc6d514..526d5be634d 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -247,7 +247,7 @@
         "description": "nir: Fix i64tof32 lowering",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "master_sha": null,
         "because_sha": "936c58c8fcceee086d3c492712595555afe82266"
     },
diff --git a/src/compiler/nir/nir_lower_int64.c b/src/compiler/nir/nir_lower_int64.c
index 03d7c156807..9d268a84363 100644
--- a/src/compiler/nir/nir_lower_int64.c
+++ b/src/compiler/nir/nir_lower_int64.c
@@ -714,35 +714,30 @@ lower_2f(nir_builder *b, nir_ssa_def *x, unsigned dest_bit_size,
       unreachable("Invalid dest_bit_size");
    }
 
-   /* We keep one more bit than can fit in the significand field to let the
-    * u2f32 conversion do the rounding for us.
-    */
    nir_ssa_def *discard =
-      nir_imax(b, nir_isub(b, exp, nir_imm_int(b, significand_bits + 1)),
+      nir_imax(b, nir_isub(b, exp, nir_imm_int(b, significand_bits)),
                   nir_imm_int(b, 0));
-
-   /* Part of the "round to nearest" has to be taken care of before we discard
-    * the LSB, and that's what this extra iadd is for.
-    * "Round to nearest even" is handled by u2f. That works because the
-    * shifted value either fits in the significand field (which means no
-    * rounding is required) or contains one extra bit that forces the
-    * conversion op to round things properly.
-    */
-   nir_ssa_def *add = COND_LOWER_OP(b, ishl, nir_imm_int64(b, 1), discard);
-   add = COND_LOWER_OP(b, isub, add, nir_imm_int64(b, 1));
-   nir_ssa_def *rounded_x = COND_LOWER_OP(b, iadd, x, add);
-
-   /* Signed Values can't overflow because we've saved the sign and promoted
-    * them to unsigned values.
+   nir_ssa_def *significand =
+      COND_LOWER_CAST(b, u2u32, COND_LOWER_OP(b, ushr, x, discard));
+
+   /* Round-to-nearest-even implementation:
+    * - if the non-representable part of the significand is higher than half
+    *   the minimum representable significand, we round-up
+    * - if the non-representable part of the significand is equal to half the
+    *   minimum representable significand and the representable part of the
+    *   significand is odd, we round-up
+    * - in any other case, we round-down
     */
-   if (!src_is_signed) {
-      nir_ssa_def *overflow = COND_LOWER_CMP(b, ult, rounded_x, x);
-      rounded_x = COND_LOWER_OP(b, bcsel, overflow,
-                                nir_imm_int64(b, UINT64_MAX), rounded_x);
-   }
-
-   nir_ssa_def *significand = COND_LOWER_OP(b, ushr, rounded_x, discard);
-   significand = COND_LOWER_CAST(b, u2u32, significand);
+   nir_ssa_def *lsb_mask = COND_LOWER_OP(b, ishl, nir_imm_int64(b, 1), discard);
+   nir_ssa_def *rem_mask = COND_LOWER_OP(b, isub, lsb_mask, nir_imm_int64(b, 1));
+   nir_ssa_def *half = COND_LOWER_OP(b, ishr, lsb_mask, nir_imm_int(b, 1));
+   nir_ssa_def *rem = COND_LOWER_OP(b, iand, x, rem_mask);
+   nir_ssa_def *halfway = nir_iand(b, COND_LOWER_CMP(b, ieq, rem, half),
+                                   nir_ine(b, discard, nir_imm_int(b, 0)));
+   nir_ssa_def *is_odd = nir_i2b(b, nir_iand(b, significand, nir_imm_int(b, 1)));
+   nir_ssa_def *round_up = nir_ior(b, COND_LOWER_CMP(b, ilt, half, rem),
+                                   nir_iand(b, halfway, is_odd));
+   significand = nir_iadd(b, significand, nir_b2i32(b, round_up));
 
    nir_ssa_def *res;