Mesa (master): nir: fix potential left shift of a negative value

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Module: Mesa
Branch: master
Commit: 27ec38d746824046f780efa934d4f25c1c8b32a8
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=27ec38d746824046f780efa934d4f25c1c8b32a8

Author: Rhys Perry <pendingchaos02 at gmail.com>
Date:   Wed Aug  5 21:03:31 2020 +0100

nir: fix potential left shift of a negative value

Fixes UBSan error:
src/compiler/nir/nir_constant_expressions.c:36573:32: runtime error: left shift of negative value -1

Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
Reviewed-by: Eric Anholt <eric at anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6206>

---

 src/compiler/nir/nir_opcodes.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/compiler/nir/nir_opcodes.py b/src/compiler/nir/nir_opcodes.py
index bd8e0cd09c2..e5655241415 100644
--- a/src/compiler/nir/nir_opcodes.py
+++ b/src/compiler/nir/nir_opcodes.py
@@ -785,7 +785,7 @@ binop("sne", tfloat32, _2src_commutative, "(src0 != src1) ? 1.0f : 0.0f") # Set
 # but SM5 shifts are defined to use the least significant bits, only
 # The NIR definition is according to the SM5 specification.
 opcode("ishl", 0, tint, [0, 0], [tint, tuint32], False, "",
-       "src0 << (src1 & (sizeof(src0) * 8 - 1))")
+       "(uint64_t)src0 << (src1 & (sizeof(src0) * 8 - 1))")
 opcode("ishr", 0, tint, [0, 0], [tint, tuint32], False, "",
        "src0 >> (src1 & (sizeof(src0) * 8 - 1))")
 opcode("ushr", 0, tuint, [0, 0], [tuint, tuint32], False, "",