Mesa (master): aco/tests: add test for GFX10 0x3f bug

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Module: Mesa
Branch: master
Commit: ae6330d955ed9e5a6c9a0ce12a11a08b95830bff
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ae6330d955ed9e5a6c9a0ce12a11a08b95830bff

Author: Rhys Perry <pendingchaos02 at gmail.com>
Date:   Wed Aug  5 14:53:17 2020 +0100

aco/tests: add test for GFX10 0x3f bug

Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
Reviewed-by: Daniel Schürmann <daniel at schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>

---

 src/amd/compiler/aco_builder_h.py         |  2 +-
 src/amd/compiler/tests/test_assembler.cpp | 19 +++++++++++++++++++
 2 files changed, 20 insertions(+), 1 deletion(-)

diff --git a/src/amd/compiler/aco_builder_h.py b/src/amd/compiler/aco_builder_h.py
index 1e217dea11b..a5338ce67ef 100644
--- a/src/amd/compiler/aco_builder_h.py
+++ b/src/amd/compiler/aco_builder_h.py
@@ -548,7 +548,7 @@ formats = [("pseudo", [Format.PSEUDO], 'Pseudo_instruction', list(itertools.prod
            ("branch", [Format.PSEUDO_BRANCH], 'Pseudo_branch_instruction', itertools.product([1], [0, 1])),
            ("barrier", [Format.PSEUDO_BARRIER], 'Pseudo_barrier_instruction', [(0, 0)]),
            ("reduction", [Format.PSEUDO_REDUCTION], 'Pseudo_reduction_instruction', [(3, 2)]),
-           ("vop1", [Format.VOP1], 'VOP1_instruction', [(1, 1), (2, 2)]),
+           ("vop1", [Format.VOP1], 'VOP1_instruction', [(0, 0), (1, 1), (2, 2)]),
            ("vop2", [Format.VOP2], 'VOP2_instruction', itertools.product([1, 2], [2, 3])),
            ("vop2_sdwa", [Format.VOP2, Format.SDWA], 'SDWA_instruction', itertools.product([1, 2], [2, 3])),
            ("vopc", [Format.VOPC], 'VOPC_instruction', itertools.product([1, 2], [2])),
diff --git a/src/amd/compiler/tests/test_assembler.cpp b/src/amd/compiler/tests/test_assembler.cpp
index 6f493a49fa2..eb3756a0cf5 100644
--- a/src/amd/compiler/tests/test_assembler.cpp
+++ b/src/amd/compiler/tests/test_assembler.cpp
@@ -39,3 +39,22 @@ BEGIN_TEST(assembler.s_memtime)
       finish_assembler_test();
    }
 END_TEST
+
+BEGIN_TEST(assembler.branch_3f)
+   if (!setup_cs(NULL, (chip_class)GFX10))
+      return;
+
+   //! BB0:
+   //! s_branch BB1                                                ; bf820040
+   //! s_nop 0                                                     ; bf800000
+   bld.sopp(aco_opcode::s_branch, Definition(PhysReg(0), s2), 1);
+
+   for (unsigned i = 0; i < 0x3f; i++)
+      bld.vop1(aco_opcode::v_nop);
+
+   bld.reset(program->create_and_insert_block());
+
+   program->blocks[1].linear_preds.push_back(0u);
+
+   finish_assembler_test();
+END_TEST