Mesa (master): nir/vtn: SPIR-V bit count opcodes (core and extension) dest size mismatches nir
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Thu Aug 27 17:32:04 UTC 2020
Module: Mesa
Branch: master
Commit: 608c87afdddb9524bce3d2ccd95c2297b453072b
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=608c87afdddb9524bce3d2ccd95c2297b453072b
Author: Jesse Natalie <jenatali at microsoft.com>
Date: Tue Jun 23 05:45:36 2020 -0700
nir/vtn: SPIR-V bit count opcodes (core and extension) dest size mismatches nir
SPIR-V dest sizes match the input, while nir is always int32. Insert
casts from the nir op to the expected SPIR-V dest.
Reviewed-by: Boris Brezillon <boris.brezillon at collabora.com>
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6313>
---
src/compiler/spirv/vtn_alu.c | 9 ++++++++-
src/compiler/spirv/vtn_opencl.c | 7 +++++--
2 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/src/compiler/spirv/vtn_alu.c b/src/compiler/spirv/vtn_alu.c
index ada56dcb67c..b403a25e51b 100644
--- a/src/compiler/spirv/vtn_alu.c
+++ b/src/compiler/spirv/vtn_alu.c
@@ -257,7 +257,6 @@ vtn_nir_alu_op_for_spirv_opcode(struct vtn_builder *b,
case SpvOpBitFieldSExtract: return nir_op_ibitfield_extract;
case SpvOpBitFieldUExtract: return nir_op_ubitfield_extract;
case SpvOpBitReverse: return nir_op_bitfield_reverse;
- case SpvOpBitCount: return nir_op_bit_count;
case SpvOpUCountLeadingZerosINTEL: return nir_op_uclz;
/* SpvOpUCountTrailingZerosINTEL is handled elsewhere. */
@@ -640,6 +639,14 @@ vtn_handle_alu(struct vtn_builder *b, SpvOp opcode,
nir_imm_int(&b->nb, 32u));
break;
+ case SpvOpBitCount: {
+ /* bit_count always returns int32, but the SPIR-V opcode just says the return
+ * value needs to be big enough to store the number of bits.
+ */
+ dest->def = nir_u2u(&b->nb, nir_bit_count(&b->nb, src[0]), glsl_get_bit_size(dest_type));
+ break;
+ }
+
default: {
bool swap;
unsigned src_bit_size = glsl_get_bit_size(vtn_src[0]->type);
diff --git a/src/compiler/spirv/vtn_opencl.c b/src/compiler/spirv/vtn_opencl.c
index a4eb41d241b..b5e92dc3b85 100644
--- a/src/compiler/spirv/vtn_opencl.c
+++ b/src/compiler/spirv/vtn_opencl.c
@@ -117,8 +117,11 @@ handle_alu(struct vtn_builder *b, enum OpenCLstd_Entrypoints opcode,
unsigned num_srcs, nir_ssa_def **srcs,
const struct glsl_type *dest_type)
{
- return nir_build_alu(&b->nb, nir_alu_op_for_opencl_opcode(b, opcode),
- srcs[0], srcs[1], srcs[2], NULL);
+ nir_ssa_def *ret = nir_build_alu(&b->nb, nir_alu_op_for_opencl_opcode(b, opcode),
+ srcs[0], srcs[1], srcs[2], NULL);
+ if (opcode == OpenCLstd_Popcount)
+ ret = nir_u2u(&b->nb, ret, glsl_get_bit_size(dest_type));
+ return ret;
}
static nir_ssa_def *
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