Mesa (master): pan/mdg: Scalarize 64-bit
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Mon Aug 31 12:07:54 UTC 2020
Module: Mesa
Branch: master
Commit: 2486fe6761d4d365b03870171a747bd06a840ad0
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2486fe6761d4d365b03870171a747bd06a840ad0
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Thu Aug 27 14:55:11 2020 -0400
pan/mdg: Scalarize 64-bit
We don't properly support 64-bit vec2 yet for various reasons, and as-is
vectorize will try to create vec4 which we choke on. Since any workloads
relying on 64-bit vector performance are already DOA at this point,
let's just do the conformant thing.
Fixes:
dEQP-GLES31.functional.shaders.builtin_functions.integer.umulextended.uvec2_highp_compute
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6516>
---
src/panfrost/midgard/midgard_compile.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/src/panfrost/midgard/midgard_compile.c b/src/panfrost/midgard/midgard_compile.c
index 1b9ea1bd751..4b15ef93209 100644
--- a/src/panfrost/midgard/midgard_compile.c
+++ b/src/panfrost/midgard/midgard_compile.c
@@ -461,6 +461,23 @@ midgard_nir_reorder_writeout(nir_shader *nir)
return progress;
}
+static bool
+mdg_is_64(const nir_instr *instr, const void *_unused)
+{
+ const nir_alu_instr *alu = nir_instr_as_alu(instr);
+
+ if (nir_dest_bit_size(alu->dest.dest) == 64)
+ return true;
+
+ switch (alu->op) {
+ case nir_op_umul_high:
+ case nir_op_imul_high:
+ return true;
+ default:
+ return false;
+ }
+}
+
/* Flushes undefined values to zero */
static void
@@ -543,6 +560,8 @@ optimise_nir(nir_shader *nir, unsigned quirks, bool is_blend)
NIR_PASS(progress, nir, nir_opt_vectorize);
} while (progress);
+ NIR_PASS_V(nir, nir_lower_alu_to_scalar, mdg_is_64, NULL);
+
/* Run after opts so it can hit more */
if (!is_blend)
NIR_PASS(progress, nir, nir_fuse_io_16);
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