Mesa (master): aco: use FALLTHROUGH macro

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 2d12991e016bbb948c01a86e7628440987c244c2
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2d12991e016bbb948c01a86e7628440987c244c2

Author: Rhys Perry <pendingchaos02 at gmail.com>
Date:   Tue Dec  1 09:54:31 2020 +0000

aco: use FALLTHROUGH macro

Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7844>

---

 src/amd/compiler/aco_instruction_selection.cpp       | 3 +--
 src/amd/compiler/aco_instruction_selection_setup.cpp | 2 +-
 src/amd/compiler/aco_optimizer.cpp                   | 6 +++---
 src/amd/compiler/aco_validate.cpp                    | 2 +-
 4 files changed, 6 insertions(+), 7 deletions(-)

diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index 58bffb8b70b..f1621b231cb 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -7688,8 +7688,7 @@ void visit_intrinsic(isel_context *ctx, nir_intrinsic_instr *instr)
          bld.copy(Definition(dst), Operand(get_arg(ctx, ctx->args->ac.view_index)));
          break;
       }
-
-      /* fallthrough */
+      FALLTHROUGH;
    }
    case nir_intrinsic_load_layer_id: {
       unsigned idx = nir_intrinsic_base(instr);
diff --git a/src/amd/compiler/aco_instruction_selection_setup.cpp b/src/amd/compiler/aco_instruction_selection_setup.cpp
index 008db0a68e9..94053a0b9df 100644
--- a/src/amd/compiler/aco_instruction_selection_setup.cpp
+++ b/src/amd/compiler/aco_instruction_selection_setup.cpp
@@ -738,7 +738,7 @@ void init_context(isel_context *ctx, nir_shader *shader)
                      break;
                   case nir_op_bcsel:
                      type = nir_dest_is_divergent(alu_instr->dest.dest) ? RegType::vgpr : RegType::sgpr;
-                     /* fallthrough */
+                     FALLTHROUGH;
                   default:
                      for (unsigned i = 0; i < nir_op_infos[alu_instr->op].num_inputs; i++) {
                         if (regclasses[alu_instr->src[i].src.ssa->index].type() == RegType::vgpr)
diff --git a/src/amd/compiler/aco_optimizer.cpp b/src/amd/compiler/aco_optimizer.cpp
index 30005394fee..123963296d4 100644
--- a/src/amd/compiler/aco_optimizer.cpp
+++ b/src/amd/compiler/aco_optimizer.cpp
@@ -1263,7 +1263,7 @@ void label_instruction(opt_ctx &ctx, Block& block, aco_ptr<Instruction>& instr)
          ctx.info[instr->definitions[0].tempId()].set_vec(instr.get());
          break;
       }
-      /* fallthrough */
+      FALLTHROUGH;
    case aco_opcode::p_as_uniform:
       if (instr->definitions[0].isFixed()) {
          /* don't copy-propagate copies into fixed registers */
@@ -1458,7 +1458,7 @@ void label_instruction(opt_ctx &ctx, Block& block, aco_ptr<Instruction>& instr)
             }
          }
       }
-      /* fallthrough */
+      FALLTHROUGH;
    case aco_opcode::s_or_b32:
    case aco_opcode::s_or_b64:
    case aco_opcode::s_xor_b32:
@@ -1468,7 +1468,7 @@ void label_instruction(opt_ctx &ctx, Block& block, aco_ptr<Instruction>& instr)
                       })) {
          ctx.info[instr->definitions[0].tempId()].set_uniform_bitwise();
       }
-      /* fallthrough */
+      FALLTHROUGH;
    case aco_opcode::s_lshl_b32:
    case aco_opcode::v_or_b32:
    case aco_opcode::v_lshlrev_b32:
diff --git a/src/amd/compiler/aco_validate.cpp b/src/amd/compiler/aco_validate.cpp
index eb351d5661a..ae7e8a93ed2 100644
--- a/src/amd/compiler/aco_validate.cpp
+++ b/src/amd/compiler/aco_validate.cpp
@@ -467,7 +467,7 @@ bool validate_ir(Program* program)
          }
          case Format::FLAT:
             check(instr->operands[1].isUndefined(), "Flat instructions don't support SADDR", instr.get());
-            /* fallthrough */
+            FALLTHROUGH;
          case Format::GLOBAL:
          case Format::SCRATCH: {
             check(instr->operands[0].isTemp() && instr->operands[0].regClass().type() == RegType::vgpr, "FLAT/GLOBAL/SCRATCH address must be vgpr", instr.get());