Mesa (master): radeonsi: fix future C++ compile failures and warnings
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Wed Dec 9 21:57:53 UTC 2020
Module: Mesa
Branch: master
Commit: fe839baf6afa30f1504006d0b03b59b3981d0615
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fe839baf6afa30f1504006d0b03b59b3981d0615
Author: Marek Olšák <marek.olsak at amd.com>
Date: Tue Aug 25 22:30:55 2020 -0400
radeonsi: fix future C++ compile failures and warnings
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7807>
---
src/gallium/drivers/radeonsi/si_build_pm4.h | 5 ++---
src/gallium/drivers/radeonsi/si_pipe.h | 32 ++++++++++++++--------------
src/gallium/drivers/radeonsi/si_shader.h | 2 +-
src/gallium/drivers/radeonsi/si_state_draw.c | 19 +++++++++--------
4 files changed, 29 insertions(+), 29 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_build_pm4.h b/src/gallium/drivers/radeonsi/si_build_pm4.h
index 47af020c9e4..b1fd406332a 100644
--- a/src/gallium/drivers/radeonsi/si_build_pm4.h
+++ b/src/gallium/drivers/radeonsi/si_build_pm4.h
@@ -264,12 +264,11 @@ static inline void radeon_opt_set_context_regn(struct si_context *sctx, unsigned
unsigned *value, unsigned *saved_val, unsigned num)
{
struct radeon_cmdbuf *cs = &sctx->gfx_cs;
- int i, j;
- for (i = 0; i < num; i++) {
+ for (unsigned i = 0; i < num; i++) {
if (saved_val[i] != value[i]) {
radeon_set_context_reg_seq(cs, offset, num);
- for (j = 0; j < num; j++)
+ for (unsigned j = 0; j < num; j++)
radeon_emit(cs, value[j]);
memcpy(saved_val, value, sizeof(uint32_t) * num);
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index 4602afb3646..b0b7d5469fa 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -50,10 +50,10 @@ extern "C" {
* one which will mean "unknown" for the purpose of state tracking and
* the number shouldn't be a commonly-used one. */
#define SI_BASE_VERTEX_UNKNOWN INT_MIN
-#define SI_START_INSTANCE_UNKNOWN INT_MIN
-#define SI_DRAW_ID_UNKNOWN INT_MIN
-#define SI_RESTART_INDEX_UNKNOWN INT_MIN
-#define SI_INSTANCE_COUNT_UNKNOWN INT_MIN
+#define SI_START_INSTANCE_UNKNOWN ((unsigned)INT_MIN)
+#define SI_DRAW_ID_UNKNOWN ((unsigned)INT_MIN)
+#define SI_RESTART_INDEX_UNKNOWN ((unsigned)INT_MIN)
+#define SI_INSTANCE_COUNT_UNKNOWN ((unsigned)INT_MIN)
#define SI_NUM_SMOOTH_AA_SAMPLES 8
#define SI_MAX_POINT_SIZE 2048
#define SI_GS_PER_ES 128
@@ -1106,17 +1106,17 @@ struct si_context {
bool ngg : 1;
bool same_patch_vertices : 1;
uint8_t ngg_culling;
- int last_index_size;
+ unsigned last_index_size;
int last_base_vertex;
- int last_start_instance;
- int last_instance_count;
- int last_drawid;
- int last_sh_base_reg;
+ unsigned last_start_instance;
+ unsigned last_instance_count;
+ unsigned last_drawid;
+ unsigned last_sh_base_reg;
int last_primitive_restart_en;
- int last_restart_index;
- int last_prim;
- int last_multi_vgt_param;
- int last_gs_out_prim;
+ unsigned last_restart_index;
+ unsigned last_prim;
+ unsigned last_multi_vgt_param;
+ unsigned last_gs_out_prim;
int last_binning_enabled;
unsigned current_vs_state;
unsigned last_vs_state;
@@ -1140,11 +1140,11 @@ struct si_context {
/* Local shader (VS), or HS if LS-HS are merged. */
struct si_shader *last_ls;
struct si_shader_selector *last_tcs;
- int last_num_tcs_input_cp;
- int last_tes_sh_base;
+ unsigned last_num_tcs_input_cp;
+ unsigned last_tes_sh_base;
bool last_tess_uses_primid;
unsigned last_num_patches;
- int last_ls_hs_config;
+ unsigned last_ls_hs_config;
/* Debug state. */
bool is_debug;
diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h
index a0b66926157..b635b696569 100644
--- a/src/gallium/drivers/radeonsi/si_shader.h
+++ b/src/gallium/drivers/radeonsi/si_shader.h
@@ -443,7 +443,7 @@ struct si_shader_selector {
unsigned ngg_cull_nonindexed_fast_launch_vert_threshold; /* UINT32_MAX = disabled */
ubyte clipdist_mask;
ubyte culldist_mask;
- ubyte rast_prim;
+ enum pipe_prim_type rast_prim;
/* ES parameters. */
uint16_t esgs_itemsize; /* vertex stride */
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 597fb579d4c..0e4e2c4d835 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -1697,7 +1697,8 @@ static void si_get_draw_start_count(struct si_context *sctx, const struct pipe_d
unsigned *data;
if (indirect->indirect_draw_count) {
- data = pipe_buffer_map_range(&sctx->b, indirect->indirect_draw_count,
+ data = (unsigned*)
+ pipe_buffer_map_range(&sctx->b, indirect->indirect_draw_count,
indirect->indirect_draw_count_offset, sizeof(unsigned),
PIPE_MAP_READ, &transfer);
@@ -1714,7 +1715,8 @@ static void si_get_draw_start_count(struct si_context *sctx, const struct pipe_d
}
map_size = (indirect_count - 1) * indirect->stride + 3 * sizeof(unsigned);
- data = pipe_buffer_map_range(&sctx->b, indirect->buffer, indirect->offset, map_size,
+ data = (unsigned*)
+ pipe_buffer_map_range(&sctx->b, indirect->buffer, indirect->offset, map_size,
PIPE_MAP_READ, &transfer);
begin = UINT_MAX;
@@ -1797,15 +1799,18 @@ static bool si_all_vs_resources_read_only(struct si_context *sctx, struct pipe_r
{
struct radeon_winsys *ws = sctx->ws;
struct radeon_cmdbuf *cs = &sctx->gfx_cs;
+ struct si_descriptors *buffers =
+ &sctx->descriptors[si_const_and_shader_buffer_descriptors_idx(PIPE_SHADER_VERTEX)];
+ struct si_shader_selector *vs = sctx->vs_shader.cso;
+ struct si_vertex_elements *velems = sctx->vertex_elements;
+ unsigned num_velems = velems->count;
+ unsigned num_images = vs->info.base.num_images;
/* Index buffer. */
if (indexbuf && ws->cs_is_buffer_referenced(cs, si_resource(indexbuf)->buf, RADEON_USAGE_WRITE))
goto has_write_reference;
/* Vertex buffers. */
- struct si_vertex_elements *velems = sctx->vertex_elements;
- unsigned num_velems = velems->count;
-
for (unsigned i = 0; i < num_velems; i++) {
if (!((1 << i) & velems->first_vb_use_mask))
continue;
@@ -1820,8 +1825,6 @@ static bool si_all_vs_resources_read_only(struct si_context *sctx, struct pipe_r
}
/* Constant and shader buffers. */
- struct si_descriptors *buffers =
- &sctx->descriptors[si_const_and_shader_buffer_descriptors_idx(PIPE_SHADER_VERTEX)];
for (unsigned i = 0; i < buffers->num_active_slots; i++) {
unsigned index = buffers->first_active_slot + i;
struct pipe_resource *res = sctx->const_and_shader_buffers[PIPE_SHADER_VERTEX].buffers[index];
@@ -1833,7 +1836,6 @@ static bool si_all_vs_resources_read_only(struct si_context *sctx, struct pipe_r
}
/* Samplers. */
- struct si_shader_selector *vs = sctx->vs_shader.cso;
if (vs->info.base.textures_used) {
unsigned num_samplers = util_last_bit(vs->info.base.textures_used);
@@ -1848,7 +1850,6 @@ static bool si_all_vs_resources_read_only(struct si_context *sctx, struct pipe_r
}
/* Images. */
- unsigned num_images = vs->info.base.num_images;
if (num_images) {
for (unsigned i = 0; i < num_images; i++) {
struct pipe_resource *res = sctx->images[PIPE_SHADER_VERTEX].views[i].resource;
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