Mesa (master): amd/registers: add missing VRS registers
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Mon Dec 14 16:41:51 UTC 2020
Module: Mesa
Branch: master
Commit: 9770ffb07ccd148387e9ec9b65854fcce492834b
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9770ffb07ccd148387e9ec9b65854fcce492834b
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Mon Nov 23 17:59:10 2020 +0100
amd/registers: add missing VRS registers
These register definitions are copied from AMDVLK because they
aren't even in the kernel.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7837>
---
src/amd/registers/gfx103.json | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/src/amd/registers/gfx103.json b/src/amd/registers/gfx103.json
index 96c9ff1bc93..ec1f0741a43 100644
--- a/src/amd/registers/gfx103.json
+++ b/src/amd/registers/gfx103.json
@@ -8218,6 +8218,12 @@
"name": "GE_USER_VGPR_EN",
"type_ref": "GE_USER_VGPR_EN"
},
+ {
+ "chips": ["gfx103"],
+ "map": {"at": 199052, "to": "mm"},
+ "name": "GE_VRS_RATE",
+ "type_ref": "GE_VRS_RATE"
+ },
{
"chips": ["gfx103"],
"map": {"at": 199168, "to": "mm"},
@@ -14484,6 +14490,12 @@
{"bits": [2, 2], "name": "EN_USER_VGPR3"}
]
},
+ "GE_VRS_RATE": {
+ "fields": [
+ {"bits": [0, 1], "name": "RATE_X"},
+ {"bits": [4, 5], "name": "RATE_Y"}
+ ]
+ },
"GRBM_GFX_INDEX": {
"fields": [
{"bits": [0, 7], "name": "INSTANCE_INDEX"},
@@ -16525,7 +16537,8 @@
"fields": [
{"bits": [1, 1], "name": "EN_REG_RT_INDEX"},
{"bits": [3, 3], "name": "EN_PRIM_PAYLOAD"},
- {"bits": [4, 4], "name": "EN_DRAW_VP"}
+ {"bits": [4, 4], "name": "EN_DRAW_VP"},
+ {"bits": [6, 6], "name": "EN_VRS_RATE"}
]
},
"VGT_ENHANCE": {
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