Mesa (master): freedreno/a6xx: Fix assert which checks the count of shader outputs

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Module: Mesa
Branch: master
Commit: 4b208fa36b484d2dbe0e7f1fc707544d3a1f17c5
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4b208fa36b484d2dbe0e7f1fc707544d3a1f17c5

Author: Danylo Piliaiev <dpiliaiev at igalia.com>
Date:   Mon Dec  7 15:56:03 2020 +0200

freedreno/a6xx: Fix assert which checks the count of shader outputs

The actual max count is 32 which corresponds to 128 output components.

Fixes: 2251a434 "freedreno/a6xx: Write multiple regs for SP_VS_OUT_REG and SP_VS_VPC_DST_REG"

Signed-off-by: Danylo Piliaiev <dpiliaiev at igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7917>

---

 src/gallium/drivers/freedreno/a6xx/fd6_program.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_program.c b/src/gallium/drivers/freedreno/a6xx/fd6_program.c
index f372123224a..c872c94839b 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_program.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_program.c
@@ -581,7 +581,7 @@ setup_stateobj(struct fd_ringbuffer *ring, struct fd_context *ctx,
 		setup_stream_out(state, last_shader, &l);
 	}
 
-	debug_assert(l.cnt < 32);
+	debug_assert(l.cnt <= 32);
 	if (gs)
 		OUT_PKT4(ring, REG_A6XX_SP_GS_OUT_REG(0), DIV_ROUND_UP(l.cnt, 2));
 	else if (ds)