Mesa (master): gallium: inline pipe_alpha_state to enable better DSA bitfield packing
GitLab Mirror
gitlab-mirror at kemper.freedesktop.org
Tue Dec 22 12:18:25 UTC 2020
Module: Mesa
Branch: master
Commit: d0534cea7f4920111794cf19059bd9c15b471b7f
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d0534cea7f4920111794cf19059bd9c15b471b7f
Author: Marek Olšák <marek.olsak at amd.com>
Date: Fri Dec 4 08:19:57 2020 -0500
gallium: inline pipe_alpha_state to enable better DSA bitfield packing
pipe_alpha_state and pipe_depth_state will be packed together
because they have only a few bitfields each. This will eventually
remove 4 bytes of padding in pipe_depth_stencil_alpha_state.
Reviewed-by: Eric Anholt <eric at anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7940>
---
src/gallium/auxiliary/driver_trace/tr_dump_state.c | 10 +++------
src/gallium/auxiliary/util/u_dump_state.c | 12 ++++------
src/gallium/auxiliary/vl/vl_compositor.c | 6 ++---
src/gallium/auxiliary/vl/vl_mpeg12_decoder.c | 6 ++---
src/gallium/drivers/etnaviv/etnaviv_state.c | 2 +-
src/gallium/drivers/etnaviv/etnaviv_zsa.c | 8 +++----
src/gallium/drivers/freedreno/a2xx/fd2_zsa.c | 8 +++----
src/gallium/drivers/freedreno/a3xx/fd3_zsa.c | 8 +++----
src/gallium/drivers/freedreno/a4xx/fd4_zsa.c | 6 ++---
src/gallium/drivers/freedreno/a5xx/fd5_zsa.c | 8 +++----
src/gallium/drivers/freedreno/a6xx/fd6_zsa.c | 8 +++----
src/gallium/drivers/i915/i915_state.c | 6 ++---
src/gallium/drivers/iris/iris_state.c | 26 +++++++++++++---------
src/gallium/drivers/llvmpipe/lp_bld_alpha.h | 1 -
src/gallium/drivers/llvmpipe/lp_state_blend.c | 2 +-
src/gallium/drivers/llvmpipe/lp_state_derived.c | 2 +-
src/gallium/drivers/llvmpipe/lp_state_fs.c | 4 ++--
src/gallium/drivers/nouveau/nv30/nv30_state.c | 6 ++---
.../drivers/nouveau/nv50/nv50_shader_state.c | 4 ++--
src/gallium/drivers/nouveau/nv50/nv50_state.c | 8 +++----
.../drivers/nouveau/nv50/nv50_state_validate.c | 2 +-
src/gallium/drivers/nouveau/nvc0/nvc0_state.c | 8 +++----
.../drivers/nouveau/nvc0/nvc0_state_validate.c | 2 +-
src/gallium/drivers/panfrost/pan_context.c | 2 +-
src/gallium/drivers/r300/r300_hyperz.c | 2 +-
src/gallium/drivers/r300/r300_state.c | 8 +++----
src/gallium/drivers/r600/evergreen_state.c | 6 ++---
src/gallium/drivers/r600/r600_state.c | 6 ++---
src/gallium/drivers/radeonsi/si_state.c | 6 ++---
src/gallium/drivers/softpipe/sp_quad_depth_test.c | 8 +++----
src/gallium/drivers/softpipe/sp_quad_pipe.c | 2 +-
src/gallium/drivers/svga/svga_pipe_depthstencil.c | 6 ++---
src/gallium/drivers/swr/swr_state.cpp | 9 ++++----
src/gallium/drivers/v3d/v3d_program.c | 4 ++--
src/gallium/drivers/v3d/v3d_uniforms.c | 2 +-
src/gallium/drivers/vc4/vc4_program.c | 4 ++--
src/gallium/drivers/vc4/vc4_uniforms.c | 2 +-
src/gallium/drivers/virgl/virgl_encode.c | 6 ++---
src/gallium/frontends/nine/nine_pipe.c | 6 ++---
src/gallium/include/pipe/p_state.h | 13 ++++-------
src/mesa/state_tracker/st_atom_depth.c | 6 ++---
41 files changed, 120 insertions(+), 131 deletions(-)
diff --git a/src/gallium/auxiliary/driver_trace/tr_dump_state.c b/src/gallium/auxiliary/driver_trace/tr_dump_state.c
index 29c60e6fedf..759b03442ae 100644
--- a/src/gallium/auxiliary/driver_trace/tr_dump_state.c
+++ b/src/gallium/auxiliary/driver_trace/tr_dump_state.c
@@ -379,13 +379,9 @@ void trace_dump_depth_stencil_alpha_state(const struct pipe_depth_stencil_alpha_
trace_dump_array_end();
trace_dump_member_end();
- trace_dump_member_begin("alpha");
- trace_dump_struct_begin("pipe_alpha_state");
- trace_dump_member(bool, &state->alpha, enabled);
- trace_dump_member(uint, &state->alpha, func);
- trace_dump_member(float, &state->alpha, ref_value);
- trace_dump_struct_end();
- trace_dump_member_end();
+ trace_dump_member(bool, state, alpha_enabled);
+ trace_dump_member(uint, state, alpha_func);
+ trace_dump_member(float, state, alpha_ref_value);
trace_dump_struct_end();
}
diff --git a/src/gallium/auxiliary/util/u_dump_state.c b/src/gallium/auxiliary/util/u_dump_state.c
index 40d1ac5a2a8..0de6832e572 100644
--- a/src/gallium/auxiliary/util/u_dump_state.c
+++ b/src/gallium/auxiliary/util/u_dump_state.c
@@ -554,15 +554,11 @@ util_dump_depth_stencil_alpha_state(FILE *stream, const struct pipe_depth_stenci
util_dump_array_end(stream);
util_dump_member_end(stream);
- util_dump_member_begin(stream, "alpha");
- util_dump_struct_begin(stream, "pipe_alpha_state");
- util_dump_member(stream, bool, &state->alpha, enabled);
- if (state->alpha.enabled) {
- util_dump_member(stream, enum_func, &state->alpha, func);
- util_dump_member(stream, float, &state->alpha, ref_value);
+ util_dump_member(stream, bool, state, alpha_enabled);
+ if (state->alpha_enabled) {
+ util_dump_member(stream, enum_func, state, alpha_func);
+ util_dump_member(stream, float, state, alpha_ref_value);
}
- util_dump_struct_end(stream);
- util_dump_member_end(stream);
util_dump_struct_end(stream);
}
diff --git a/src/gallium/auxiliary/vl/vl_compositor.c b/src/gallium/auxiliary/vl/vl_compositor.c
index 37f64885ad5..f07bd4feb78 100644
--- a/src/gallium/auxiliary/vl/vl_compositor.c
+++ b/src/gallium/auxiliary/vl/vl_compositor.c
@@ -205,9 +205,9 @@ init_pipe_state(struct vl_compositor *c)
dsa.stencil[i].valuemask = 0;
dsa.stencil[i].writemask = 0;
}
- dsa.alpha.enabled = 0;
- dsa.alpha.func = PIPE_FUNC_ALWAYS;
- dsa.alpha.ref_value = 0;
+ dsa.alpha_enabled = 0;
+ dsa.alpha_func = PIPE_FUNC_ALWAYS;
+ dsa.alpha_ref_value = 0;
c->dsa = c->pipe->create_depth_stencil_alpha_state(c->pipe, &dsa);
c->pipe->bind_depth_stencil_alpha_state(c->pipe, c->dsa);
}
diff --git a/src/gallium/auxiliary/vl/vl_mpeg12_decoder.c b/src/gallium/auxiliary/vl/vl_mpeg12_decoder.c
index 66d8538a444..73b5026b42a 100644
--- a/src/gallium/auxiliary/vl/vl_mpeg12_decoder.c
+++ b/src/gallium/auxiliary/vl/vl_mpeg12_decoder.c
@@ -874,9 +874,9 @@ init_pipe_state(struct vl_mpeg12_decoder *dec)
dsa.stencil[i].valuemask = 0;
dsa.stencil[i].writemask = 0;
}
- dsa.alpha.enabled = 0;
- dsa.alpha.func = PIPE_FUNC_ALWAYS;
- dsa.alpha.ref_value = 0;
+ dsa.alpha_enabled = 0;
+ dsa.alpha_func = PIPE_FUNC_ALWAYS;
+ dsa.alpha_ref_value = 0;
dec->dsa = dec->context->create_depth_stencil_alpha_state(dec->context, &dsa);
dec->context->bind_depth_stencil_alpha_state(dec->context, dec->dsa);
diff --git a/src/gallium/drivers/etnaviv/etnaviv_state.c b/src/gallium/drivers/etnaviv/etnaviv_state.c
index 3e837acc708..ed3d191c60d 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_state.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_state.c
@@ -691,7 +691,7 @@ etna_update_zsa(struct etna_context *ctx)
if (VIV_FEATURE(screen, chipMinorFeatures5, RA_WRITE_DEPTH) &&
!VIV_FEATURE(screen, chipFeatures, NO_EARLY_Z) &&
!zsa->stencil_enabled &&
- !zsa_state->alpha.enabled &&
+ !zsa_state->alpha_enabled &&
!shader_state->writes_z &&
!shader_state->uses_discard)
early_z_write = true;
diff --git a/src/gallium/drivers/etnaviv/etnaviv_zsa.c b/src/gallium/drivers/etnaviv/etnaviv_zsa.c
index 66d0c290c9f..0810999d114 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_zsa.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_zsa.c
@@ -91,15 +91,15 @@ etna_zsa_state_create(struct pipe_context *pctx,
uint32_t extra_reference = 0;
if (VIV_FEATURE(screen, chipMinorFeatures1, HALF_FLOAT))
- extra_reference = _mesa_float_to_half(SATURATE(so->alpha.ref_value));
+ extra_reference = _mesa_float_to_half(SATURATE(so->alpha_ref_value));
cs->PE_STENCIL_CONFIG_EXT =
VIVS_PE_STENCIL_CONFIG_EXT_EXTRA_ALPHA_REF(extra_reference);
cs->PE_ALPHA_OP =
- COND(so->alpha.enabled, VIVS_PE_ALPHA_OP_ALPHA_TEST) |
- VIVS_PE_ALPHA_OP_ALPHA_FUNC(so->alpha.func) |
- VIVS_PE_ALPHA_OP_ALPHA_REF(etna_cfloat_to_uint8(so->alpha.ref_value));
+ COND(so->alpha_enabled, VIVS_PE_ALPHA_OP_ALPHA_TEST) |
+ VIVS_PE_ALPHA_OP_ALPHA_FUNC(so->alpha_func) |
+ VIVS_PE_ALPHA_OP_ALPHA_REF(etna_cfloat_to_uint8(so->alpha_ref_value));
for (unsigned i = 0; i < 2; i++) {
const struct pipe_stencil_state *stencil_front = (so->stencil[1].enabled && so->stencil[1].valuemask) ? &so->stencil[i] : &so->stencil[0];
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_zsa.c b/src/gallium/drivers/freedreno/a2xx/fd2_zsa.c
index d3c19b4450c..aa421220363 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_zsa.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_zsa.c
@@ -50,7 +50,7 @@ fd2_zsa_state_create(struct pipe_context *pctx,
if (cso->depth.enabled)
so->rb_depthcontrol |= A2XX_RB_DEPTHCONTROL_Z_ENABLE |
- COND(!cso->alpha.enabled, A2XX_RB_DEPTHCONTROL_EARLY_Z_ENABLE);
+ COND(!cso->alpha_enabled, A2XX_RB_DEPTHCONTROL_EARLY_Z_ENABLE);
if (cso->depth.writemask)
so->rb_depthcontrol |= A2XX_RB_DEPTHCONTROL_Z_WRITE_ENABLE;
@@ -84,11 +84,11 @@ fd2_zsa_state_create(struct pipe_context *pctx,
}
}
- if (cso->alpha.enabled) {
+ if (cso->alpha_enabled) {
so->rb_colorcontrol =
- A2XX_RB_COLORCONTROL_ALPHA_FUNC(cso->alpha.func) |
+ A2XX_RB_COLORCONTROL_ALPHA_FUNC(cso->alpha_func) |
A2XX_RB_COLORCONTROL_ALPHA_TEST_ENABLE;
- so->rb_alpha_ref = fui(cso->alpha.ref_value);
+ so->rb_alpha_ref = fui(cso->alpha_ref_value);
}
return so;
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_zsa.c b/src/gallium/drivers/freedreno/a3xx/fd3_zsa.c
index ddd52b3dcdb..4a6d7cb2e55 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_zsa.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_zsa.c
@@ -87,13 +87,13 @@ fd3_zsa_state_create(struct pipe_context *pctx,
}
}
- if (cso->alpha.enabled) {
+ if (cso->alpha_enabled) {
so->rb_render_control =
A3XX_RB_RENDER_CONTROL_ALPHA_TEST |
- A3XX_RB_RENDER_CONTROL_ALPHA_TEST_FUNC(cso->alpha.func);
+ A3XX_RB_RENDER_CONTROL_ALPHA_TEST_FUNC(cso->alpha_func);
so->rb_alpha_ref =
- A3XX_RB_ALPHA_REF_UINT(cso->alpha.ref_value * 255.0) |
- A3XX_RB_ALPHA_REF_FLOAT(cso->alpha.ref_value);
+ A3XX_RB_ALPHA_REF_UINT(cso->alpha_ref_value * 255.0) |
+ A3XX_RB_ALPHA_REF_FLOAT(cso->alpha_ref_value);
so->rb_depth_control |=
A3XX_RB_DEPTH_CONTROL_EARLY_Z_DISABLE;
}
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_zsa.c b/src/gallium/drivers/freedreno/a4xx/fd4_zsa.c
index b21d8d93298..81775112b73 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_zsa.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_zsa.c
@@ -89,14 +89,14 @@ fd4_zsa_state_create(struct pipe_context *pctx,
}
}
- if (cso->alpha.enabled) {
- uint32_t ref = cso->alpha.ref_value * 255.0;
+ if (cso->alpha_enabled) {
+ uint32_t ref = cso->alpha_ref_value * 255.0;
so->gras_alpha_control =
A4XX_GRAS_ALPHA_CONTROL_ALPHA_TEST_ENABLE;
so->rb_alpha_control =
A4XX_RB_ALPHA_CONTROL_ALPHA_TEST |
A4XX_RB_ALPHA_CONTROL_ALPHA_REF(ref) |
- A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(cso->alpha.func);
+ A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(cso->alpha_func);
so->rb_depth_control |=
A4XX_RB_DEPTH_CONTROL_EARLY_Z_DISABLE;
}
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_zsa.c b/src/gallium/drivers/freedreno/a5xx/fd5_zsa.c
index 495a4cc8a3f..d07063550bd 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_zsa.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_zsa.c
@@ -62,7 +62,7 @@ fd5_zsa_state_create(struct pipe_context *pctx,
break;
}
- if (!(cso->stencil->enabled || cso->alpha.enabled || !cso->depth.writemask))
+ if (!(cso->stencil->enabled || cso->alpha_enabled || !cso->depth.writemask))
so->lrz_write = true;
so->rb_depth_cntl |=
@@ -105,12 +105,12 @@ fd5_zsa_state_create(struct pipe_context *pctx,
}
}
- if (cso->alpha.enabled) {
- uint32_t ref = cso->alpha.ref_value * 255.0;
+ if (cso->alpha_enabled) {
+ uint32_t ref = cso->alpha_ref_value * 255.0;
so->rb_alpha_control =
A5XX_RB_ALPHA_CONTROL_ALPHA_TEST |
A5XX_RB_ALPHA_CONTROL_ALPHA_REF(ref) |
- A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(cso->alpha.func);
+ A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(cso->alpha_func);
// so->rb_depth_control |=
// A5XX_RB_DEPTH_CONTROL_EARLY_Z_DISABLE;
}
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_zsa.c b/src/gallium/drivers/freedreno/a6xx/fd6_zsa.c
index 08c9e4f113c..0ef4bcf0892 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_zsa.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_zsa.c
@@ -185,20 +185,20 @@ fd6_zsa_state_create(struct pipe_context *pctx,
}
}
- if (cso->alpha.enabled) {
+ if (cso->alpha_enabled) {
/* Alpha test is functionally a conditional discard, so we can't
* write LRZ before seeing if we end up discarding or not
*/
- if (cso->alpha.func != PIPE_FUNC_ALWAYS) {
+ if (cso->alpha_func != PIPE_FUNC_ALWAYS) {
so->lrz.write = false;
so->alpha_test = true;
}
- uint32_t ref = cso->alpha.ref_value * 255.0;
+ uint32_t ref = cso->alpha_ref_value * 255.0;
so->rb_alpha_control =
A6XX_RB_ALPHA_CONTROL_ALPHA_TEST |
A6XX_RB_ALPHA_CONTROL_ALPHA_REF(ref) |
- A6XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(cso->alpha.func);
+ A6XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(cso->alpha_func);
}
for (int i = 0; i < 4; i++) {
diff --git a/src/gallium/drivers/i915/i915_state.c b/src/gallium/drivers/i915/i915_state.c
index 2ef14c30cd7..6726936bea2 100644
--- a/src/gallium/drivers/i915/i915_state.c
+++ b/src/gallium/drivers/i915/i915_state.c
@@ -535,9 +535,9 @@ i915_create_depth_stencil_state(struct pipe_context *pipe,
cso->depth_LIS6 |= S6_DEPTH_WRITE_ENABLE;
}
- if (depth_stencil->alpha.enabled) {
- int test = i915_translate_compare_func(depth_stencil->alpha.func);
- ubyte refByte = float_to_ubyte(depth_stencil->alpha.ref_value);
+ if (depth_stencil->alpha_enabled) {
+ int test = i915_translate_compare_func(depth_stencil->alpha_func);
+ ubyte refByte = float_to_ubyte(depth_stencil->alpha_ref_value);
cso->depth_LIS6 |= (S6_ALPHA_TEST_ENABLE |
(test << S6_ALPHA_TEST_FUNC_SHIFT) |
diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c
index 3aa0ea5b311..adb29127eb8 100644
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -1347,7 +1347,9 @@ struct iris_depth_stencil_alpha_state {
#endif
/** Outbound to BLEND_STATE, 3DSTATE_PS_BLEND, COLOR_CALC_STATE. */
- struct pipe_alpha_state alpha;
+ unsigned alpha_enabled:1;
+ unsigned alpha_func:3; /**< PIPE_FUNC_x */
+ float alpha_ref_value; /**< reference value */
/** Outbound to resolve and cache set tracking. */
bool depth_writes_enabled;
@@ -1372,7 +1374,9 @@ iris_create_zsa_state(struct pipe_context *ctx,
bool two_sided_stencil = state->stencil[1].enabled;
- cso->alpha = state->alpha;
+ cso->alpha_enabled = state->alpha_enabled;
+ cso->alpha_func = state->alpha_func;
+ cso->alpha_ref_value = state->alpha_ref_value;
cso->depth_writes_enabled = state->depth.writemask;
cso->depth_test_enabled = state->depth.enabled;
cso->stencil_writes_enabled =
@@ -1437,13 +1441,13 @@ iris_bind_zsa_state(struct pipe_context *ctx, void *state)
struct iris_depth_stencil_alpha_state *new_cso = state;
if (new_cso) {
- if (cso_changed(alpha.ref_value))
+ if (cso_changed(alpha_ref_value))
ice->state.dirty |= IRIS_DIRTY_COLOR_CALC_STATE;
- if (cso_changed(alpha.enabled))
+ if (cso_changed(alpha_enabled))
ice->state.dirty |= IRIS_DIRTY_PS_BLEND | IRIS_DIRTY_BLEND_STATE;
- if (cso_changed(alpha.func))
+ if (cso_changed(alpha_func))
ice->state.dirty |= IRIS_DIRTY_BLEND_STATE;
if (cso_changed(depth_writes_enabled))
@@ -1562,7 +1566,7 @@ want_pma_fix(struct iris_context *ice)
* 3DSTATE_WM_CHROMAKEY::ChromaKeyKillEnable)
*/
bool killpixels = wm_prog_data->uses_kill || wm_prog_data->uses_omask ||
- cso_blend->alpha_to_coverage || cso_zsa->alpha.enabled;
+ cso_blend->alpha_to_coverage || cso_zsa->alpha_enabled;
/* The Gen8 depth PMA equation becomes:
*
@@ -4196,7 +4200,7 @@ iris_populate_fs_key(const struct iris_context *ice,
key->alpha_to_coverage = blend->alpha_to_coverage;
- key->alpha_test_replicate_alpha = fb->nr_cbufs > 1 && zsa->alpha.enabled;
+ key->alpha_test_replicate_alpha = fb->nr_cbufs > 1 && zsa->alpha_enabled;
key->flat_shade = rast->flatshade &&
(info->inputs_read & (VARYING_BIT_COL0 | VARYING_BIT_COL1));
@@ -5593,8 +5597,8 @@ iris_upload_dirty_render_state(struct iris_context *ice,
uint32_t blend_state_header;
iris_pack_state(GENX(BLEND_STATE), &blend_state_header, bs) {
- bs.AlphaTestEnable = cso_zsa->alpha.enabled;
- bs.AlphaTestFunction = translate_compare_func(cso_zsa->alpha.func);
+ bs.AlphaTestEnable = cso_zsa->alpha_enabled;
+ bs.AlphaTestFunction = translate_compare_func(cso_zsa->alpha_func);
}
blend_map[0] = blend_state_header | cso_blend->blend_state[0];
@@ -5619,7 +5623,7 @@ iris_upload_dirty_render_state(struct iris_context *ice,
64, &cc_offset);
iris_pack_state(GENX(COLOR_CALC_STATE), cc_map, cc) {
cc.AlphaTestFormat = ALPHATEST_FLOAT32;
- cc.AlphaReferenceValueAsFLOAT32 = cso->alpha.ref_value;
+ cc.AlphaReferenceValueAsFLOAT32 = cso->alpha_ref_value;
cc.BlendConstantColorRed = ice->state.blend_color.color[0];
cc.BlendConstantColorGreen = ice->state.blend_color.color[1];
cc.BlendConstantColorBlue = ice->state.blend_color.color[2];
@@ -5997,7 +6001,7 @@ iris_upload_dirty_render_state(struct iris_context *ice,
uint32_t dynamic_pb[GENX(3DSTATE_PS_BLEND_length)];
iris_pack_command(GENX(3DSTATE_PS_BLEND), &dynamic_pb, pb) {
pb.HasWriteableRT = has_writeable_rt(cso_blend, fs_info);
- pb.AlphaTestEnable = cso_zsa->alpha.enabled;
+ pb.AlphaTestEnable = cso_zsa->alpha_enabled;
/* The dual source blending docs caution against using SRC1 factors
* when the shader doesn't use a dual source render target write.
diff --git a/src/gallium/drivers/llvmpipe/lp_bld_alpha.h b/src/gallium/drivers/llvmpipe/lp_bld_alpha.h
index 15f1284c5e1..95eaad018e9 100644
--- a/src/gallium/drivers/llvmpipe/lp_bld_alpha.h
+++ b/src/gallium/drivers/llvmpipe/lp_bld_alpha.h
@@ -38,7 +38,6 @@
#include "gallivm/lp_bld.h"
-struct pipe_alpha_state;
struct util_format_description;
struct gallivm_state;
struct lp_type;
diff --git a/src/gallium/drivers/llvmpipe/lp_state_blend.c b/src/gallium/drivers/llvmpipe/lp_state_blend.c
index bd61a40f48a..df60dfc2e72 100644
--- a/src/gallium/drivers/llvmpipe/lp_state_blend.c
+++ b/src/gallium/drivers/llvmpipe/lp_state_blend.c
@@ -122,7 +122,7 @@ llvmpipe_create_depth_stencil_state(struct pipe_context *pipe,
}
if (LP_PERF & PERF_NO_ALPHATEST) {
- state->alpha.enabled = 0;
+ state->alpha_enabled = 0;
}
return state;
diff --git a/src/gallium/drivers/llvmpipe/lp_state_derived.c b/src/gallium/drivers/llvmpipe/lp_state_derived.c
index a0f6e2485d2..4db4559fa15 100644
--- a/src/gallium/drivers/llvmpipe/lp_state_derived.c
+++ b/src/gallium/drivers/llvmpipe/lp_state_derived.c
@@ -251,7 +251,7 @@ void llvmpipe_update_derived( struct llvmpipe_context *llvmpipe )
if (llvmpipe->dirty & LP_NEW_DEPTH_STENCIL_ALPHA) {
lp_setup_set_alpha_ref_value(llvmpipe->setup,
- llvmpipe->depth_stencil->alpha.ref_value);
+ llvmpipe->depth_stencil->alpha_ref_value);
lp_setup_set_stencil_ref_values(llvmpipe->setup,
llvmpipe->stencil_ref.ref_value);
}
diff --git a/src/gallium/drivers/llvmpipe/lp_state_fs.c b/src/gallium/drivers/llvmpipe/lp_state_fs.c
index baea9130c89..f9a9d0b9329 100644
--- a/src/gallium/drivers/llvmpipe/lp_state_fs.c
+++ b/src/gallium/drivers/llvmpipe/lp_state_fs.c
@@ -3986,10 +3986,10 @@ make_variant_key(struct llvmpipe_context *lp,
if (!lp->framebuffer.nr_cbufs ||
!lp->framebuffer.cbufs[0] ||
!util_format_is_pure_integer(lp->framebuffer.cbufs[0]->format)) {
- key->alpha.enabled = lp->depth_stencil->alpha.enabled;
+ key->alpha.enabled = lp->depth_stencil->alpha_enabled;
}
if(key->alpha.enabled)
- key->alpha.func = lp->depth_stencil->alpha.func;
+ key->alpha.func = lp->depth_stencil->alpha_func;
/* alpha.ref_value is passed in jit_context */
key->flatshade = lp->rasterizer->flatshade;
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_state.c b/src/gallium/drivers/nouveau/nv30/nv30_state.c
index 27120bfc55e..da66569d37c 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_state.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_state.c
@@ -263,9 +263,9 @@ nv30_zsa_state_create(struct pipe_context *pipe,
}
SB_MTHD30(so, ALPHA_FUNC_ENABLE, 3);
- SB_DATA (so, cso->alpha.enabled ? 1 : 0);
- SB_DATA (so, nvgl_comparison_op(cso->alpha.func));
- SB_DATA (so, float_to_ubyte(cso->alpha.ref_value));
+ SB_DATA (so, cso->alpha_enabled ? 1 : 0);
+ SB_DATA (so, nvgl_comparison_op(cso->alpha_func));
+ SB_DATA (so, float_to_ubyte(cso->alpha_ref_value));
return so;
}
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_shader_state.c b/src/gallium/drivers/nouveau/nv50/nv50_shader_state.c
index 2cbbdc0cc35..ae32a1345da 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_shader_state.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_shader_state.c
@@ -177,7 +177,7 @@ nv50_fragprog_validate(struct nv50_context *nv50)
if (!fp || !rast)
return;
- if (nv50->zsa && nv50->zsa->pipe.alpha.enabled) {
+ if (nv50->zsa && nv50->zsa->pipe.alpha_enabled) {
struct pipe_framebuffer_state *fb = &nv50->framebuffer;
bool blendable = fb->nr_cbufs == 0 || !fb->cbufs[0] ||
nv50->screen->base.base.is_format_supported(
@@ -195,7 +195,7 @@ nv50_fragprog_validate(struct nv50_context *nv50)
if (fp->fp.alphatest || !blendable) {
uint8_t alphatest = PIPE_FUNC_ALWAYS + 1;
if (!blendable)
- alphatest = nv50->zsa->pipe.alpha.func + 1;
+ alphatest = nv50->zsa->pipe.alpha_func + 1;
if (!fp->fp.alphatest)
nv50_program_destroy(nv50, fp);
else if (fp->mem && fp->fp.alphatest != alphatest)
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_state.c b/src/gallium/drivers/nouveau/nv50/nv50_state.c
index 8e80e68698a..88f3717d1d0 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_state.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_state.c
@@ -418,11 +418,11 @@ nv50_zsa_state_create(struct pipe_context *pipe,
}
SB_BEGIN_3D(so, ALPHA_TEST_ENABLE, 1);
- if (cso->alpha.enabled) {
+ if (cso->alpha_enabled) {
SB_DATA (so, 1);
SB_BEGIN_3D(so, ALPHA_TEST_REF, 2);
- SB_DATA (so, fui(cso->alpha.ref_value));
- SB_DATA (so, nvgl_comparison_op(cso->alpha.func));
+ SB_DATA (so, fui(cso->alpha_ref_value));
+ SB_DATA (so, nvgl_comparison_op(cso->alpha_func));
} else {
SB_DATA (so, 0);
}
@@ -430,7 +430,7 @@ nv50_zsa_state_create(struct pipe_context *pipe,
SB_BEGIN_3D(so, CB_ADDR, 1);
SB_DATA (so, NV50_CB_AUX_ALPHATEST_OFFSET << (8 - 2) | NV50_CB_AUX);
SB_BEGIN_3D(so, CB_DATA(0), 1);
- SB_DATA (so, fui(cso->alpha.ref_value));
+ SB_DATA (so, fui(cso->alpha_ref_value));
assert(so->size <= ARRAY_SIZE(so->state));
return (void *)so;
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c b/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c
index fcf2228c178..e7ba8ac1aa8 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c
@@ -339,7 +339,7 @@ nv50_validate_derived_2(struct nv50_context *nv50)
{
struct nouveau_pushbuf *push = nv50->base.pushbuf;
- if (nv50->zsa && nv50->zsa->pipe.alpha.enabled &&
+ if (nv50->zsa && nv50->zsa->pipe.alpha_enabled &&
nv50->framebuffer.nr_cbufs == 0) {
nv50_fb_set_null_rt(push, 0);
BEGIN_NV04(push, NV50_3D(RT_CONTROL), 1);
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_state.c b/src/gallium/drivers/nouveau/nvc0/nvc0_state.c
index 9605d347f6d..372dd64e6f5 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_state.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_state.c
@@ -411,11 +411,11 @@ nvc0_zsa_state_create(struct pipe_context *pipe,
SB_IMMED_3D(so, STENCIL_TWO_SIDE_ENABLE, 0);
}
- SB_IMMED_3D(so, ALPHA_TEST_ENABLE, cso->alpha.enabled);
- if (cso->alpha.enabled) {
+ SB_IMMED_3D(so, ALPHA_TEST_ENABLE, cso->alpha_enabled);
+ if (cso->alpha_enabled) {
SB_BEGIN_3D(so, ALPHA_TEST_REF, 2);
- SB_DATA (so, fui(cso->alpha.ref_value));
- SB_DATA (so, nvgl_comparison_op(cso->alpha.func));
+ SB_DATA (so, fui(cso->alpha_ref_value));
+ SB_DATA (so, nvgl_comparison_op(cso->alpha_func));
}
assert(so->size <= ARRAY_SIZE(so->state));
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c b/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c
index 48d81f197db..a0e3051e5d4 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c
@@ -753,7 +753,7 @@ nvc0_validate_zsa_fb(struct nvc0_context *nvc0)
{
struct nouveau_pushbuf *push = nvc0->base.pushbuf;
- if (nvc0->zsa && nvc0->zsa->pipe.alpha.enabled &&
+ if (nvc0->zsa && nvc0->zsa->pipe.alpha_enabled &&
nvc0->framebuffer.zsbuf &&
nvc0->framebuffer.nr_cbufs == 0) {
nvc0_fb_set_null_rt(push, 0, 0);
diff --git a/src/gallium/drivers/panfrost/pan_context.c b/src/gallium/drivers/panfrost/pan_context.c
index fda0ea149b6..ed556cdc7c0 100644
--- a/src/gallium/drivers/panfrost/pan_context.c
+++ b/src/gallium/drivers/panfrost/pan_context.c
@@ -1224,7 +1224,7 @@ panfrost_create_depth_stencil_state(struct pipe_context *pipe,
}
/* Alpha lowered by frontend */
- assert(!zsa->alpha.enabled);
+ assert(!zsa->alpha_enabled);
/* TODO: Bounds test should be easy */
assert(!zsa->depth.bounds_test);
diff --git a/src/gallium/drivers/r300/r300_hyperz.c b/src/gallium/drivers/r300/r300_hyperz.c
index 6e85ae43cad..96061b60adc 100644
--- a/src/gallium/drivers/r300/r300_hyperz.c
+++ b/src/gallium/drivers/r300/r300_hyperz.c
@@ -250,7 +250,7 @@ static boolean r300_dsa_alpha_test_enabled(
/* We are interested only in the cases when alpha testing can kill
* a fragment. */
- return dsa->alpha.enabled && dsa->alpha.func != PIPE_FUNC_ALWAYS;
+ return dsa->alpha_enabled && dsa->alpha_func != PIPE_FUNC_ALWAYS;
}
static void r300_update_ztop(struct r300_context* r300)
diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c
index 348f9621b5e..bcc516cbddc 100644
--- a/src/gallium/drivers/r300/r300_state.c
+++ b/src/gallium/drivers/r300/r300_state.c
@@ -747,13 +747,13 @@ static void* r300_create_dsa_state(struct pipe_context* pipe,
}
/* Alpha test setup. */
- if (state->alpha.enabled) {
+ if (state->alpha_enabled) {
dsa->alpha_function =
- r300_translate_alpha_function(state->alpha.func) |
+ r300_translate_alpha_function(state->alpha_func) |
R300_FG_ALPHA_FUNC_ENABLE;
- dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value);
- alpha_value_fp16 = _mesa_float_to_half(state->alpha.ref_value);
+ dsa->alpha_function |= float_to_ubyte(state->alpha_ref_value);
+ alpha_value_fp16 = _mesa_float_to_half(state->alpha_ref_value);
}
BEGIN_CB(&dsa->cb_begin, 8);
diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index 3d8088ac60b..0ac938ec1bd 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -453,10 +453,10 @@ static void *evergreen_create_dsa_state(struct pipe_context *ctx,
/* alpha */
alpha_test_control = 0;
alpha_ref = 0;
- if (state->alpha.enabled) {
- alpha_test_control = S_028410_ALPHA_FUNC(state->alpha.func);
+ if (state->alpha_enabled) {
+ alpha_test_control = S_028410_ALPHA_FUNC(state->alpha_func);
alpha_test_control |= S_028410_ALPHA_TEST_ENABLE(1);
- alpha_ref = fui(state->alpha.ref_value);
+ alpha_ref = fui(state->alpha_ref_value);
}
dsa->sx_alpha_test_control = alpha_test_control & 0xff;
dsa->alpha_ref = alpha_ref;
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index fa0d0874402..08bf4d2e41e 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -441,10 +441,10 @@ static void *r600_create_dsa_state(struct pipe_context *ctx,
/* alpha */
alpha_test_control = 0;
alpha_ref = 0;
- if (state->alpha.enabled) {
- alpha_test_control = S_028410_ALPHA_FUNC(state->alpha.func);
+ if (state->alpha_enabled) {
+ alpha_test_control = S_028410_ALPHA_FUNC(state->alpha_func);
alpha_test_control |= S_028410_ALPHA_TEST_ENABLE(1);
- alpha_ref = fui(state->alpha.ref_value);
+ alpha_ref = fui(state->alpha_ref_value);
}
dsa->sx_alpha_test_control = alpha_test_control & 0xff;
dsa->alpha_ref = alpha_ref;
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 6033af77e6f..ae8e0c3def9 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -1174,11 +1174,11 @@ static void *si_create_dsa_state(struct pipe_context *ctx,
}
/* alpha */
- if (state->alpha.enabled) {
- dsa->alpha_func = state->alpha.func;
+ if (state->alpha_enabled) {
+ dsa->alpha_func = state->alpha_func;
si_pm4_set_reg(pm4, R_00B030_SPI_SHADER_USER_DATA_PS_0 + SI_SGPR_ALPHA_REF * 4,
- fui(state->alpha.ref_value));
+ fui(state->alpha_ref_value));
} else {
dsa->alpha_func = PIPE_FUNC_ALWAYS;
}
diff --git a/src/gallium/drivers/softpipe/sp_quad_depth_test.c b/src/gallium/drivers/softpipe/sp_quad_depth_test.c
index e8433814c34..76331e3b68c 100644
--- a/src/gallium/drivers/softpipe/sp_quad_depth_test.c
+++ b/src/gallium/drivers/softpipe/sp_quad_depth_test.c
@@ -689,7 +689,7 @@ depth_stencil_test_quad(struct quad_stage *qs,
struct quad_header *quads[], \
unsigned nr ) \
{ \
- const float ref = qs->softpipe->depth_stencil->alpha.ref_value; \
+ const float ref = qs->softpipe->depth_stencil->alpha_ref_value; \
const uint cbuf = 0; /* only output[0].alpha is tested */ \
unsigned pass_nr = 0; \
unsigned i; \
@@ -728,7 +728,7 @@ alpha_test_quads(struct quad_stage *qs,
struct quad_header *quads[],
unsigned nr)
{
- switch (qs->softpipe->depth_stencil->alpha.func) {
+ switch (qs->softpipe->depth_stencil->alpha_func) {
case PIPE_FUNC_LESS:
return alpha_test_quads_LESS( qs, quads, nr );
case PIPE_FUNC_EQUAL:
@@ -789,7 +789,7 @@ depth_test_quads_fallback(struct quad_stage *qs,
data.use_shader_stencil_refs = FALSE;
- if (qs->softpipe->depth_stencil->alpha.enabled) {
+ if (qs->softpipe->depth_stencil->alpha_enabled) {
nr = alpha_test_quads(qs, quads, nr);
}
@@ -904,7 +904,7 @@ choose_depth_test(struct quad_stage *qs,
boolean interp_depth = !fsInfo->writes_z || qs->softpipe->early_depth;
- boolean alpha = qs->softpipe->depth_stencil->alpha.enabled;
+ boolean alpha = qs->softpipe->depth_stencil->alpha_enabled;
boolean depth = qs->softpipe->depth_stencil->depth.enabled;
diff --git a/src/gallium/drivers/softpipe/sp_quad_pipe.c b/src/gallium/drivers/softpipe/sp_quad_pipe.c
index dbe4c0eb67e..27f5916a45e 100644
--- a/src/gallium/drivers/softpipe/sp_quad_pipe.c
+++ b/src/gallium/drivers/softpipe/sp_quad_pipe.c
@@ -45,7 +45,7 @@ sp_build_quad_pipeline(struct softpipe_context *sp)
boolean early_depth_test =
(sp->depth_stencil->depth.enabled &&
sp->framebuffer.zsbuf &&
- !sp->depth_stencil->alpha.enabled &&
+ !sp->depth_stencil->alpha_enabled &&
!sp->fs_variant->info.uses_kill &&
!sp->fs_variant->info.writes_z &&
!sp->fs_variant->info.writes_stencil) ||
diff --git a/src/gallium/drivers/svga/svga_pipe_depthstencil.c b/src/gallium/drivers/svga/svga_pipe_depthstencil.c
index 7a5fb89e0fa..1dfe82ed130 100644
--- a/src/gallium/drivers/svga/svga_pipe_depthstencil.c
+++ b/src/gallium/drivers/svga/svga_pipe_depthstencil.c
@@ -197,10 +197,10 @@ svga_create_depth_stencil_state(struct pipe_context *pipe,
ds->zfunc = SVGA3D_CMP_ALWAYS;
}
- ds->alphatestenable = templ->alpha.enabled;
+ ds->alphatestenable = templ->alpha_enabled;
if (ds->alphatestenable) {
- ds->alphafunc = svga_translate_compare_func(templ->alpha.func);
- ds->alpharef = templ->alpha.ref_value;
+ ds->alphafunc = svga_translate_compare_func(templ->alpha_func);
+ ds->alpharef = templ->alpha_ref_value;
}
else {
ds->alphafunc = SVGA3D_CMP_ALWAYS;
diff --git a/src/gallium/drivers/swr/swr_state.cpp b/src/gallium/drivers/swr/swr_state.cpp
index bf79e35300f..1b9a2983344 100644
--- a/src/gallium/drivers/swr/swr_state.cpp
+++ b/src/gallium/drivers/swr/swr_state.cpp
@@ -1837,7 +1837,6 @@ swr_update_derived(struct pipe_context *pipe,
struct pipe_stencil_state *front_stencil =
ctx->depth_stencil.stencil[0];
struct pipe_stencil_state *back_stencil = ctx->depth_stencil.stencil[1];
- struct pipe_alpha_state alpha;
*/
if (stencil[0].enabled) {
depthStencilState.stencilWriteEnable = 1;
@@ -1899,7 +1898,7 @@ swr_update_derived(struct pipe_context *pipe,
blendState.constantColor[2] = ctx->blend_color.color[2];
blendState.constantColor[3] = ctx->blend_color.color[3];
blendState.alphaTestReference =
- *((uint32_t*)&ctx->depth_stencil->alpha.ref_value);
+ *((uint32_t*)&ctx->depth_stencil->alpha_ref_value);
blendState.sampleMask = ctx->sample_mask;
blendState.sampleCount = GetSampleCount(fb->samples);
@@ -1942,13 +1941,13 @@ swr_update_derived(struct pipe_context *pipe,
if (compileState.blendState.blendEnable == false &&
compileState.blendState.logicOpEnable == false &&
- ctx->depth_stencil->alpha.enabled == 0) {
+ ctx->depth_stencil->alpha_enabled == 0) {
ctx->api.pfnSwrSetBlendFunc(ctx->swrContext, target, NULL);
continue;
}
compileState.desc.alphaTestEnable =
- ctx->depth_stencil->alpha.enabled;
+ ctx->depth_stencil->alpha_enabled;
compileState.desc.independentAlphaBlendEnable =
(compileState.blendState.sourceBlendFactor !=
compileState.blendState.sourceAlphaBlendFactor) ||
@@ -1962,7 +1961,7 @@ swr_update_derived(struct pipe_context *pipe,
compileState.desc.numSamples = fb->samples;
compileState.alphaTestFunction =
- swr_convert_depth_func(ctx->depth_stencil->alpha.func);
+ swr_convert_depth_func(ctx->depth_stencil->alpha_func);
compileState.alphaTestFormat = ALPHA_TEST_FLOAT32; // xxx
compileState.Canonicalize();
diff --git a/src/gallium/drivers/v3d/v3d_program.c b/src/gallium/drivers/v3d/v3d_program.c
index 64229d27b19..a17078da093 100644
--- a/src/gallium/drivers/v3d/v3d_program.c
+++ b/src/gallium/drivers/v3d/v3d_program.c
@@ -566,9 +566,9 @@ v3d_update_compiled_fs(struct v3d_context *v3d, uint8_t prim_mode)
key->sample_alpha_to_one = v3d->blend->base.alpha_to_one;
}
- if (v3d->zsa->base.alpha.enabled) {
+ if (v3d->zsa->base.alpha_enabled) {
key->alpha_test = true;
- key->alpha_test_func = v3d->zsa->base.alpha.func;
+ key->alpha_test_func = v3d->zsa->base.alpha_func;
}
key->swap_color_rb = v3d->swap_color_rb;
diff --git a/src/gallium/drivers/v3d/v3d_uniforms.c b/src/gallium/drivers/v3d/v3d_uniforms.c
index b1e8e828614..dfd65c9ed43 100644
--- a/src/gallium/drivers/v3d/v3d_uniforms.c
+++ b/src/gallium/drivers/v3d/v3d_uniforms.c
@@ -309,7 +309,7 @@ v3d_write_uniforms(struct v3d_context *v3d, struct v3d_job *job,
case QUNIFORM_ALPHA_REF:
cl_aligned_f(&uniforms,
- v3d->zsa->base.alpha.ref_value);
+ v3d->zsa->base.alpha_ref_value);
break;
case QUNIFORM_LINE_WIDTH:
diff --git a/src/gallium/drivers/vc4/vc4_program.c b/src/gallium/drivers/vc4/vc4_program.c
index 49c889e3ac2..fc7057b3aac 100644
--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -2739,8 +2739,8 @@ vc4_update_compiled_fs(struct vc4_context *vc4, uint8_t prim_mode)
key->stencil_full_writemasks = vc4->zsa->stencil_uniforms[2] != 0;
key->depth_enabled = (vc4->zsa->base.depth.enabled ||
key->stencil_enabled);
- if (vc4->zsa->base.alpha.enabled)
- key->alpha_test_func = vc4->zsa->base.alpha.func;
+ if (vc4->zsa->base.alpha_enabled)
+ key->alpha_test_func = vc4->zsa->base.alpha_func;
else
key->alpha_test_func = COMPARE_FUNC_ALWAYS;
diff --git a/src/gallium/drivers/vc4/vc4_uniforms.c b/src/gallium/drivers/vc4/vc4_uniforms.c
index dd07487ab16..e456105c427 100644
--- a/src/gallium/drivers/vc4/vc4_uniforms.c
+++ b/src/gallium/drivers/vc4/vc4_uniforms.c
@@ -342,7 +342,7 @@ vc4_write_uniforms(struct vc4_context *vc4, struct vc4_compiled_shader *shader,
case QUNIFORM_ALPHA_REF:
cl_aligned_f(&uniforms,
- vc4->zsa->base.alpha.ref_value);
+ vc4->zsa->base.alpha_ref_value);
break;
case QUNIFORM_SAMPLE_MASK:
diff --git a/src/gallium/drivers/virgl/virgl_encode.c b/src/gallium/drivers/virgl/virgl_encode.c
index f58cc62e53e..fc1bdfbb7a5 100644
--- a/src/gallium/drivers/virgl/virgl_encode.c
+++ b/src/gallium/drivers/virgl/virgl_encode.c
@@ -370,8 +370,8 @@ int virgl_encode_dsa_state(struct virgl_context *ctx,
tmp = VIRGL_OBJ_DSA_S0_DEPTH_ENABLE(dsa_state->depth.enabled) |
VIRGL_OBJ_DSA_S0_DEPTH_WRITEMASK(dsa_state->depth.writemask) |
VIRGL_OBJ_DSA_S0_DEPTH_FUNC(dsa_state->depth.func) |
- VIRGL_OBJ_DSA_S0_ALPHA_ENABLED(dsa_state->alpha.enabled) |
- VIRGL_OBJ_DSA_S0_ALPHA_FUNC(dsa_state->alpha.func);
+ VIRGL_OBJ_DSA_S0_ALPHA_ENABLED(dsa_state->alpha_enabled) |
+ VIRGL_OBJ_DSA_S0_ALPHA_FUNC(dsa_state->alpha_func);
virgl_encoder_write_dword(ctx->cbuf, tmp);
for (i = 0; i < 2; i++) {
@@ -385,7 +385,7 @@ int virgl_encode_dsa_state(struct virgl_context *ctx,
virgl_encoder_write_dword(ctx->cbuf, tmp);
}
- virgl_encoder_write_dword(ctx->cbuf, fui(dsa_state->alpha.ref_value));
+ virgl_encoder_write_dword(ctx->cbuf, fui(dsa_state->alpha_ref_value));
return 0;
}
int virgl_encode_rasterizer_state(struct virgl_context *ctx,
diff --git a/src/gallium/frontends/nine/nine_pipe.c b/src/gallium/frontends/nine/nine_pipe.c
index cc63a9fce8f..985acf690f5 100644
--- a/src/gallium/frontends/nine/nine_pipe.c
+++ b/src/gallium/frontends/nine/nine_pipe.c
@@ -64,9 +64,9 @@ nine_convert_dsa_state(struct pipe_depth_stencil_alpha_state *dsa_state,
}
if (rs[D3DRS_ALPHATESTENABLE]) {
- dsa.alpha.enabled = 1;
- dsa.alpha.func = d3dcmpfunc_to_pipe_func(rs[D3DRS_ALPHAFUNC]);
- dsa.alpha.ref_value = (float)rs[D3DRS_ALPHAREF] / 255.0f;
+ dsa.alpha_enabled = 1;
+ dsa.alpha_func = d3dcmpfunc_to_pipe_func(rs[D3DRS_ALPHAFUNC]);
+ dsa.alpha_ref_value = (float)rs[D3DRS_ALPHAREF] / 255.0f;
}
*dsa_state = dsa;
diff --git a/src/gallium/include/pipe/p_state.h b/src/gallium/include/pipe/p_state.h
index e96d2d65ca9..6add3a14a8b 100644
--- a/src/gallium/include/pipe/p_state.h
+++ b/src/gallium/include/pipe/p_state.h
@@ -324,19 +324,14 @@ struct pipe_stencil_state
};
-struct pipe_alpha_state
-{
- unsigned enabled:1;
- unsigned func:3; /**< PIPE_FUNC_x */
- float ref_value; /**< reference value */
-};
-
-
struct pipe_depth_stencil_alpha_state
{
struct pipe_depth_state depth;
struct pipe_stencil_state stencil[2]; /**< [0] = front, [1] = back */
- struct pipe_alpha_state alpha;
+
+ unsigned alpha_enabled:1; /**< alpha test enabled? */
+ unsigned alpha_func:3; /**< PIPE_FUNC_x */
+ float alpha_ref_value; /**< reference value */
};
diff --git a/src/mesa/state_tracker/st_atom_depth.c b/src/mesa/state_tracker/st_atom_depth.c
index 5ebb1d77a1e..96601d87a09 100644
--- a/src/mesa/state_tracker/st_atom_depth.c
+++ b/src/mesa/state_tracker/st_atom_depth.c
@@ -151,9 +151,9 @@ st_update_depth_stencil_alpha(struct st_context *st)
if (ctx->Color.AlphaEnabled && !st->lower_alpha_test &&
!(ctx->DrawBuffer->_IntegerBuffers & 0x1)) {
- dsa->alpha.enabled = 1;
- dsa->alpha.func = st_compare_func_to_pipe(ctx->Color.AlphaFunc);
- dsa->alpha.ref_value = ctx->Color.AlphaRefUnclamped;
+ dsa->alpha_enabled = 1;
+ dsa->alpha_func = st_compare_func_to_pipe(ctx->Color.AlphaFunc);
+ dsa->alpha_ref_value = ctx->Color.AlphaRefUnclamped;
}
cso_set_depth_stencil_alpha(st->cso_context, dsa);
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