Mesa (master): aco: make pred_by_exec_mask() accessible in other files

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 4a70c4d383dbb0efa7ae08281c7d828552b126f1
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4a70c4d383dbb0efa7ae08281c7d828552b126f1

Author: Daniel Schürmann <daniel at schuermann.dev>
Date:   Wed Aug 12 16:58:35 2020 +0200

aco: make pred_by_exec_mask() accessible in other files

and rename to needs_exec_mask().

Reviewed-by: Rhys Perry <pendingchaos02 at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7903>

---

 src/amd/compiler/aco_insert_exec_mask.cpp | 38 +------------------------------
 src/amd/compiler/aco_ir.cpp               | 35 ++++++++++++++++++++++++++++
 src/amd/compiler/aco_ir.h                 |  1 +
 3 files changed, 37 insertions(+), 37 deletions(-)

diff --git a/src/amd/compiler/aco_insert_exec_mask.cpp b/src/amd/compiler/aco_insert_exec_mask.cpp
index 1ce9d46bf69..cc6b1899a1c 100644
--- a/src/amd/compiler/aco_insert_exec_mask.cpp
+++ b/src/amd/compiler/aco_insert_exec_mask.cpp
@@ -96,42 +96,6 @@ struct exec_ctx {
    exec_ctx(Program *program_) : program(program_), info(program->blocks.size()) {}
 };
 
-bool pred_by_exec_mask(aco_ptr<Instruction>& instr) {
-   if (instr->isSALU())
-      return instr->reads_exec();
-   if (instr->format == Format::SMEM || instr->isSALU())
-      return false;
-   if (instr->format == Format::PSEUDO_BARRIER)
-      return false;
-
-   if (instr->format == Format::PSEUDO) {
-      switch (instr->opcode) {
-      case aco_opcode::p_create_vector:
-      case aco_opcode::p_extract_vector:
-      case aco_opcode::p_split_vector:
-      case aco_opcode::p_parallelcopy:
-         for (Definition def : instr->definitions) {
-            if (def.getTemp().type() == RegType::vgpr)
-               return true;
-         }
-         return false;
-      case aco_opcode::p_spill:
-      case aco_opcode::p_reload:
-         return false;
-      default:
-         break;
-      }
-   }
-
-   if (instr->opcode == aco_opcode::v_readlane_b32 ||
-       instr->opcode == aco_opcode::v_readlane_b32_e64 ||
-       instr->opcode == aco_opcode::v_writelane_b32 ||
-       instr->opcode == aco_opcode::v_writelane_b32_e64)
-      return false;
-
-   return true;
-}
-
 bool needs_exact(aco_ptr<Instruction>& instr) {
    if (instr->format == Format::MUBUF) {
       MUBUF_instruction *mubuf = static_cast<MUBUF_instruction *>(instr.get());
@@ -218,7 +182,7 @@ void get_block_needs(wqm_ctx &ctx, exec_ctx &exec_ctx, Block* block)
       WQMState needs = needs_exact(instr) ? Exact : Unspecified;
       bool propagate_wqm = instr->opcode == aco_opcode::p_wqm;
       bool preserve_wqm = instr->opcode == aco_opcode::p_discard_if;
-      bool pred_by_exec = pred_by_exec_mask(instr);
+      bool pred_by_exec = needs_exec_mask(instr.get());
       for (const Definition& definition : instr->definitions) {
          if (!definition.isTemp())
             continue;
diff --git a/src/amd/compiler/aco_ir.cpp b/src/amd/compiler/aco_ir.cpp
index a258447b662..83ef05e7ebd 100644
--- a/src/amd/compiler/aco_ir.cpp
+++ b/src/amd/compiler/aco_ir.cpp
@@ -406,4 +406,39 @@ uint32_t get_reduction_identity(ReduceOp op, unsigned idx)
    return 0;
 }
 
+bool needs_exec_mask(const Instruction* instr) {
+   if (instr->isSALU())
+      return instr->reads_exec();
+   if (instr->format == Format::SMEM || instr->isSALU())
+      return false;
+   if (instr->format == Format::PSEUDO_BARRIER)
+      return false;
+
+   if (instr->format == Format::PSEUDO) {
+      switch (instr->opcode) {
+      case aco_opcode::p_create_vector:
+      case aco_opcode::p_extract_vector:
+      case aco_opcode::p_split_vector:
+         for (Definition def : instr->definitions) {
+            if (def.getTemp().type() == RegType::vgpr)
+               return true;
+         }
+         return false;
+      case aco_opcode::p_spill:
+      case aco_opcode::p_reload:
+         return false;
+      default:
+         break;
+      }
+   }
+
+   if (instr->opcode == aco_opcode::v_readlane_b32 ||
+       instr->opcode == aco_opcode::v_readlane_b32_e64 ||
+       instr->opcode == aco_opcode::v_writelane_b32 ||
+       instr->opcode == aco_opcode::v_writelane_b32_e64)
+      return false;
+
+   return true;
+}
+
 }
diff --git a/src/amd/compiler/aco_ir.h b/src/amd/compiler/aco_ir.h
index daa30667a0f..8eb0cba49fb 100644
--- a/src/amd/compiler/aco_ir.h
+++ b/src/amd/compiler/aco_ir.h
@@ -1463,6 +1463,7 @@ bool can_use_opsel(chip_class chip, aco_opcode op, int idx, bool high);
 bool can_use_SDWA(chip_class chip, const aco_ptr<Instruction>& instr);
 /* updates "instr" and returns the old instruction (or NULL if no update was needed) */
 aco_ptr<Instruction> convert_to_SDWA(chip_class chip, aco_ptr<Instruction>& instr);
+bool needs_exec_mask(const Instruction* instr);
 
 uint32_t get_reduction_identity(ReduceOp op, unsigned idx);