Mesa (master): freedreno/ir3: Add cat4 mediump opcodes
GitLab Mirror
gitlab-mirror at kemper.freedesktop.org
Fri Feb 7 18:19:36 UTC 2020
Module: Mesa
Branch: master
Commit: d70192e6973aec3bbe2be70192f18b6a2257872a
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d70192e6973aec3bbe2be70192f18b6a2257872a
Author: Hyunjun Ko <zzoon at igalia.com>
Date: Fri Nov 1 08:34:54 2019 +0000
freedreno/ir3: Add cat4 mediump opcodes
v2: Reworked to assign half-opcodes in ir3_ra.c (krh).
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3737>
---
src/freedreno/ir3/ir3.h | 3 +++
src/freedreno/ir3/ir3_ra.c | 15 +++++++++++++++
2 files changed, 18 insertions(+)
diff --git a/src/freedreno/ir3/ir3.h b/src/freedreno/ir3/ir3.h
index fbe28ac3cc1..c682c6e0db0 100644
--- a/src/freedreno/ir3/ir3.h
+++ b/src/freedreno/ir3/ir3.h
@@ -1463,8 +1463,11 @@ INSTR3(SAD_S32)
/* cat4 instructions: */
INSTR1(RCP)
INSTR1(RSQ)
+INSTR1(HRSQ)
INSTR1(LOG2)
+INSTR1(HLOG2)
INSTR1(EXP2)
+INSTR1(HEXP2)
INSTR1(SIN)
INSTR1(COS)
INSTR1(SQRT)
diff --git a/src/freedreno/ir3/ir3_ra.c b/src/freedreno/ir3/ir3_ra.c
index 5a63e77c89e..f04db4f29ac 100644
--- a/src/freedreno/ir3/ir3_ra.c
+++ b/src/freedreno/ir3/ir3_ra.c
@@ -1110,6 +1110,21 @@ static void fixup_half_instr_dst(struct ir3_instruction *instr)
break;
}
break;
+ case 4:
+ switch (instr->opc) {
+ case OPC_RSQ:
+ instr->opc = OPC_HRSQ;
+ break;
+ case OPC_LOG2:
+ instr->opc = OPC_HLOG2;
+ break;
+ case OPC_EXP2:
+ instr->opc = OPC_HEXP2;
+ break;
+ default:
+ break;
+ }
+ break;
case 5:
instr->cat5.type = half_type(instr->cat5.type);
break;
More information about the mesa-commit
mailing list