Mesa (master): intel/fs/gen11: Work around dual-source blending hangs in combination with SIMD32.

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Module: Mesa
Branch: master
Commit: b84fa0b31e670d101ff17115519417036581f55b
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b84fa0b31e670d101ff17115519417036581f55b

Author: Francisco Jerez <currojerez at riseup.net>
Date:   Tue Jan 21 13:55:36 2020 -0800

intel/fs/gen11: Work around dual-source blending hangs in combination with SIMD32.

The SIMD8 dual-source blending framebuffer write messages seem to have
trouble releasing the pixel scoreboard dependency in SIMD32 dispatch
mode, which leads to hangs.  I have a better workaround for this which
doesn't involve disabling SIMD32 when dual-source blending is enabled,
but I'm still investigating some issues with it.  Limit the dispatch
width to SIMD16 in such cases for the moment in order to make the CI
happy on ICL with SIMD32 fragment shaders enabled.

Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

---

 src/intel/compiler/brw_fs_visitor.cpp | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/src/intel/compiler/brw_fs_visitor.cpp b/src/intel/compiler/brw_fs_visitor.cpp
index 11e0af430d8..5cb240098f9 100644
--- a/src/intel/compiler/brw_fs_visitor.cpp
+++ b/src/intel/compiler/brw_fs_visitor.cpp
@@ -537,6 +537,18 @@ fs_visitor::emit_fb_writes()
 
    inst->last_rt = true;
    inst->eot = true;
+
+   if (devinfo->gen == 11 && prog_data->dual_src_blend) {
+      /* The dual-source RT write messages fail to release the thread
+       * dependency on ICL with SIMD32 dispatch, leading to hangs.
+       *
+       * XXX - Emit an extra single-source NULL RT-write marked LastRT in
+       *       order to release the thread dependency without disabling
+       *       SIMD32.
+       */
+      limit_dispatch_width(16, "Dual source blending unsupported "
+                           "in SIMD32 mode.\n");
+   }
 }
 
 void