Mesa (master): aco: add RegisterFile
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Wed Feb 19 12:37:30 UTC 2020
Module: Mesa
Branch: master
Commit: 43497e30e265958e28a0a5912134832a1f5a3ff6
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=43497e30e265958e28a0a5912134832a1f5a3ff6
Author: Rhys Perry <pendingchaos02 at gmail.com>
Date: Fri Feb 7 16:47:31 2020 +0000
aco: add RegisterFile
Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
Reviewed-by: Daniel Schürmann <daniel at schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3768>
---
src/amd/compiler/aco_register_allocation.cpp | 39 +++++++++++++++++++---------
1 file changed, 27 insertions(+), 12 deletions(-)
diff --git a/src/amd/compiler/aco_register_allocation.cpp b/src/amd/compiler/aco_register_allocation.cpp
index 06a887bc1c1..2b1ca4ddfb8 100644
--- a/src/amd/compiler/aco_register_allocation.cpp
+++ b/src/amd/compiler/aco_register_allocation.cpp
@@ -51,10 +51,25 @@ struct ra_ctx {
ra_ctx(Program* program) : program(program) {}
};
+class RegisterFile {
+public:
+ RegisterFile() {regs.fill(0);}
+
+ std::array<uint32_t, 512> regs;
+
+ const uint32_t& operator [] (unsigned index) const {
+ return regs[index];
+ }
+
+ uint32_t& operator [] (unsigned index) {
+ return regs[index];
+ }
+};
+
/* helper function for debugging */
#if 0
-void print_regs(ra_ctx& ctx, bool vgprs, std::array<uint32_t, 512>& reg_file)
+void print_regs(ra_ctx& ctx, bool vgprs, RegisterFile& reg_file)
{
unsigned max = vgprs ? ctx.program->max_reg_demand.vgpr : ctx.program->max_reg_demand.sgpr;
unsigned lb = vgprs ? 256 : 0;
@@ -135,7 +150,7 @@ void adjust_max_used_regs(ra_ctx& ctx, RegClass rc, unsigned reg)
}
-void update_renames(ra_ctx& ctx, std::array<uint32_t, 512>& reg_file,
+void update_renames(ra_ctx& ctx, RegisterFile& reg_file,
std::vector<std::pair<Operand, Definition>>& parallelcopies,
aco_ptr<Instruction>& instr)
{
@@ -181,7 +196,7 @@ void update_renames(ra_ctx& ctx, std::array<uint32_t, 512>& reg_file,
}
std::pair<PhysReg, bool> get_reg_simple(ra_ctx& ctx,
- std::array<uint32_t, 512>& reg_file,
+ RegisterFile& reg_file,
uint32_t lb, uint32_t ub,
uint32_t size, uint32_t stride,
RegClass rc)
@@ -256,7 +271,7 @@ std::pair<PhysReg, bool> get_reg_simple(ra_ctx& ctx,
}
bool get_regs_for_copies(ra_ctx& ctx,
- std::array<uint32_t, 512>& reg_file,
+ RegisterFile& reg_file,
std::vector<std::pair<Operand, Definition>>& parallelcopies,
std::set<std::pair<unsigned, unsigned>> vars,
uint32_t lb, uint32_t ub,
@@ -422,7 +437,7 @@ bool get_regs_for_copies(ra_ctx& ctx,
std::pair<PhysReg, bool> get_reg_impl(ra_ctx& ctx,
- std::array<uint32_t, 512>& reg_file,
+ RegisterFile& reg_file,
std::vector<std::pair<Operand, Definition>>& parallelcopies,
uint32_t lb, uint32_t ub,
uint32_t size, uint32_t stride,
@@ -541,7 +556,7 @@ std::pair<PhysReg, bool> get_reg_impl(ra_ctx& ctx,
return {{}, false};
}
- std::array<uint32_t, 512> register_file = reg_file;
+ RegisterFile register_file = reg_file;
/* now, we figured the placement for our definition */
std::set<std::pair<unsigned, unsigned>> vars;
@@ -630,7 +645,7 @@ std::pair<PhysReg, bool> get_reg_impl(ra_ctx& ctx,
}
PhysReg get_reg(ra_ctx& ctx,
- std::array<uint32_t, 512>& reg_file,
+ RegisterFile& reg_file,
RegClass rc,
std::vector<std::pair<Operand, Definition>>& parallelcopies,
aco_ptr<Instruction>& instr)
@@ -693,7 +708,7 @@ PhysReg get_reg(ra_ctx& ctx,
std::pair<PhysReg, bool> get_reg_vec(ra_ctx& ctx,
- std::array<uint32_t, 512>& reg_file,
+ RegisterFile& reg_file,
RegClass rc)
{
uint32_t size = rc.size();
@@ -715,7 +730,7 @@ std::pair<PhysReg, bool> get_reg_vec(ra_ctx& ctx,
PhysReg get_reg_create_vector(ra_ctx& ctx,
- std::array<uint32_t, 512>& reg_file,
+ RegisterFile& reg_file,
RegClass rc,
std::vector<std::pair<Operand, Definition>>& parallelcopies,
aco_ptr<Instruction>& instr)
@@ -832,7 +847,7 @@ PhysReg get_reg_create_vector(ra_ctx& ctx,
}
bool get_reg_specified(ra_ctx& ctx,
- std::array<uint32_t, 512>& reg_file,
+ RegisterFile& reg_file,
RegClass rc,
std::vector<std::pair<Operand, Definition>>& parallelcopies,
aco_ptr<Instruction>& instr,
@@ -871,7 +886,7 @@ bool get_reg_specified(ra_ctx& ctx,
}
void handle_pseudo(ra_ctx& ctx,
- const std::array<uint32_t, 512>& reg_file,
+ const RegisterFile& reg_file,
Instruction* instr)
{
if (instr->format != Format::PSEUDO)
@@ -1191,7 +1206,7 @@ void register_allocation(Program *program, std::vector<std::set<Temp>> live_out_
std::set<Temp>& live = live_out_per_block[block.index];
/* initialize register file */
assert(block.index != 0 || live.empty());
- std::array<uint32_t, 512> register_file = {0};
+ RegisterFile register_file;
ctx.war_hint.reset();
for (Temp t : live) {
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