Mesa (master): ac/llvm: fix 16-bit fmed3 on GFX8 and older gens

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Module: Mesa
Branch: master
Commit: 30ac733680c3dfbfd1300c5498dd1b0c0a680905
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=30ac733680c3dfbfd1300c5498dd1b0c0a680905

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Wed Feb 26 15:09:40 2020 +0100

ac/llvm: fix 16-bit fmed3 on GFX8 and older gens

16-bit med3 is only supported on GFX9+.

Fixes dEQP-VK.spirv_assembly.instruction.amd_trinary_minmax.mid3.f16.*.

Fixes: d6a07732c9c ("ac: use llvm.amdgcn.fmed3 intrinsic for nir_op_fmed3")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3962>

---

 src/amd/llvm/ac_llvm_build.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/amd/llvm/ac_llvm_build.c b/src/amd/llvm/ac_llvm_build.c
index db7964d6aa9..116abf942c2 100644
--- a/src/amd/llvm/ac_llvm_build.c
+++ b/src/amd/llvm/ac_llvm_build.c
@@ -2725,8 +2725,10 @@ LLVMValueRef ac_build_fmed3(struct ac_llvm_context *ctx, LLVMValueRef src0,
 {
 	LLVMValueRef result;
 
-	if (bitsize == 64) {
-		/* Lower 64-bit fmed because LLVM doesn't expose an intrinsic. */
+	if (bitsize == 64 || (bitsize == 16 && ctx->chip_class <= GFX8)) {
+		/* Lower 64-bit fmed because LLVM doesn't expose an intrinsic,
+		 * or lower 16-bit fmed because it's only supported on GFX9+.
+		 */
 		LLVMValueRef min1, min2, max1;
 
 		min1 = ac_build_fmin(ctx, src0, src1);