Mesa (master): freedreno/ir3: don't precolor unassigned inputs

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Module: Mesa
Branch: master
Commit: c1f436746182027ce52c59c0efeea3d2a28dea5b
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c1f436746182027ce52c59c0efeea3d2a28dea5b

Author: Rob Clark <robdclark at chromium.org>
Date:   Tue Feb 25 17:17:55 2020 -0800

freedreno/ir3: don't precolor unassigned inputs

Fixes crash seen in:
dEQP-VK.glsl.conversions.matrix_to_matrix.mat4_to_mat3x4_vertex

Signed-off-by: Rob Clark <robdclark at chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>

---

 src/freedreno/ir3/ir3_ra.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/freedreno/ir3/ir3_ra.c b/src/freedreno/ir3/ir3_ra.c
index cf986e62c1d..35a95fd1050 100644
--- a/src/freedreno/ir3/ir3_ra.c
+++ b/src/freedreno/ir3/ir3_ra.c
@@ -1273,6 +1273,9 @@ ra_precolor(struct ir3_ra_ctx *ctx, struct ir3_instruction **precolor, unsigned
 		if (precolor[i] && !(precolor[i]->flags & IR3_INSTR_UNUSED)) {
 			struct ir3_instruction *instr = precolor[i];
 
+			if (instr->regs[0]->num == INVALID_REG)
+				continue;
+
 			struct ir3_ra_instr_data *id = &ctx->instrd[instr->ip];
 
 			debug_assert(!(instr->regs[0]->flags & (IR3_REG_HALF | IR3_REG_HIGH)));