Mesa (staging/20.0): gallivm/nir: handle mod 0 better.

[GitLab Mirror]

Module: Mesa
Branch: staging/20.0
Commit: f1ec137ec991ffee21c1879638ef8802d6d6a873
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f1ec137ec991ffee21c1879638ef8802d6d6a873

Author: Dave Airlie <airlied at redhat.com>
Date:   Wed Feb 26 12:13:13 2020 +1000

gallivm/nir: handle mod 0 better.

I haven't seen this crash but TGSI does it so best align with
it to avoid future issues.

Fixes: 44a6b0107b3J (gallivm: add nir->llvm translation (v2))
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3956>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3956>
(cherry picked from commit 2b155b1086121ec1d6bcd3598a835c68617d9aca)

---

 .pick_status.json                          |  2 +-
 src/gallium/auxiliary/gallivm/lp_bld_nir.c | 22 +++++++++++++++++++---
 2 files changed, 20 insertions(+), 4 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index d039970d049..241941fb501 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -1093,7 +1093,7 @@
         "description": "gallivm/nir: handle mod 0 better.",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "master_sha": null,
         "because_sha": "44a6b0107b37ad9644d3435cf6d2d29b6779654f"
     },
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_nir.c b/src/gallium/auxiliary/gallivm/lp_bld_nir.c
index c9f67226dcc..5e47aaaadca 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_nir.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_nir.c
@@ -411,6 +411,23 @@ do_int_divide(struct lp_build_nir_context *bld_base,
       return LLVMBuildOr(builder, div_mask, result, "");
 }
 
+static LLVMValueRef
+do_int_mod(struct lp_build_nir_context *bld_base,
+           bool is_unsigned, unsigned src_bit_size,
+           LLVMValueRef src, LLVMValueRef src2)
+{
+   struct gallivm_state *gallivm = bld_base->base.gallivm;
+   LLVMBuilderRef builder = gallivm->builder;
+   struct lp_build_context *int_bld = get_int_bld(bld_base, is_unsigned, src_bit_size);
+   LLVMValueRef div_mask = lp_build_cmp(int_bld, PIPE_FUNC_EQUAL, src2,
+                                        int_bld->zero);
+   LLVMValueRef divisor = LLVMBuildOr(builder,
+                                      div_mask,
+                                      src2, "");
+   LLVMValueRef result = lp_build_mod(int_bld, src, divisor);
+   return LLVMBuildOr(builder, div_mask, result, "");
+}
+
 static LLVMValueRef do_alu_action(struct lp_build_nir_context *bld_base,
                                   nir_op op, unsigned src_bit_size[NIR_MAX_VEC_COMPONENTS], LLVMValueRef src[NIR_MAX_VEC_COMPONENTS])
 {
@@ -660,8 +677,7 @@ static LLVMValueRef do_alu_action(struct lp_build_nir_context *bld_base,
                            src[0], src[1]);
       break;
    case nir_op_irem:
-      result = lp_build_mod(get_int_bld(bld_base, false, src_bit_size[0]),
-                            src[0], src[1]);
+      result = do_int_mod(bld_base, false, src_bit_size[0], src[0], src[1]);
       break;
    case nir_op_ishl: {
       struct lp_build_context *uint_bld = get_int_bld(bld_base, true, src_bit_size[0]);
@@ -757,7 +773,7 @@ static LLVMValueRef do_alu_action(struct lp_build_nir_context *bld_base,
       result = lp_build_min(get_int_bld(bld_base, true, src_bit_size[0]), src[0], src[1]);
       break;
    case nir_op_umod:
-      result = lp_build_mod(get_int_bld(bld_base, true, src_bit_size[0]), src[0], src[1]);
+      result = do_int_mod(bld_base, true, src_bit_size[0], src[0], src[1]);
       break;
    case nir_op_umul_high: {
       LLVMValueRef hi_bits;