Mesa (master): ac/gpu_info: add pc_lines and use it in radeonsi
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Wed Jan 8 21:04:20 UTC 2020
Module: Mesa
Branch: master
Commit: d7b565365e0262f45c0040e984c679bd3c0d42f1
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d7b565365e0262f45c0040e984c679bd3c0d42f1
Author: Marek Olšák <marek.olsak at amd.com>
Date: Tue Dec 24 13:46:23 2019 -0500
ac/gpu_info: add pc_lines and use it in radeonsi
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
---
src/amd/common/ac_gpu_info.c | 3 +++
src/amd/common/ac_gpu_info.h | 1 +
src/gallium/drivers/radeonsi/si_state.c | 2 +-
3 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index 82a6cfb825d..b8230fd03b1 100644
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -639,6 +639,8 @@ bool ac_query_gpu_info(int fd, void *dev_p,
assert(0);
}
+ info->pc_lines = pc_lines;
+
if (info->chip_class >= GFX10) {
info->pbb_max_alloc_count = pc_lines / 3;
} else {
@@ -758,6 +760,7 @@ void ac_print_gpu_info(struct radeon_info *info)
printf(" num_tcc_blocks = %i\n", info->num_tcc_blocks);
printf(" tcc_cache_line_size = %u\n", info->tcc_cache_line_size);
printf(" tcc_harvested = %u\n", info->tcc_harvested);
+ printf(" pc_lines = %u\n", info->pc_lines);
printf("CP info:\n");
printf(" gfx_ib_pad_with_type2 = %i\n", info->gfx_ib_pad_with_type2);
diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h
index 412332ea70d..08ded09030a 100644
--- a/src/amd/common/ac_gpu_info.h
+++ b/src/amd/common/ac_gpu_info.h
@@ -96,6 +96,7 @@ struct radeon_info {
uint32_t num_tcc_blocks;
uint32_t tcc_cache_line_size;
bool tcc_harvested;
+ unsigned pc_lines;
/* CP info. */
bool gfx_ib_pad_with_type2;
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 8d2dca1d197..4211ef4014a 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -5668,7 +5668,7 @@ static void si_init_config(struct si_context *sctx)
/* TODO: For culling, replace 128 with 256. */
si_pm4_set_reg(pm4, R_030980_GE_PC_ALLOC,
S_030980_OVERSUB_EN(1) |
- S_030980_NUM_PC_LINES(128 * sscreen->info.max_se - 1));
+ S_030980_NUM_PC_LINES(sscreen->info.pc_lines / 4 - 1));
}
if (sctx->chip_class >= GFX8) {
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