Mesa (master): intel/nir: Stop adding redundant barriers
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Mon Jan 13 17:51:20 UTC 2020
Module: Mesa
Branch: master
Commit: bd3ab75aef95d062cedaa92504fede9887a2c370
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bd3ab75aef95d062cedaa92504fede9887a2c370
Author: Jason Ekstrand <jason at jlekstrand.net>
Date: Tue Jan 7 14:58:45 2020 -0600
intel/nir: Stop adding redundant barriers
Now that both GLSL and SPIR-V are adding shared and tcs_patch barriers
(as appropreate) prior to the nir_intrinsic_barrier, we don't need to do
it ourselves in the back-end. This reverts commit
26e950a5de01564e3b5f2148ae994454ae5205fe.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
---
src/intel/compiler/brw_nir_lower_cs_intrinsics.c | 14 --------------
1 file changed, 14 deletions(-)
diff --git a/src/intel/compiler/brw_nir_lower_cs_intrinsics.c b/src/intel/compiler/brw_nir_lower_cs_intrinsics.c
index 3f48a3c5dda..434ad005281 100644
--- a/src/intel/compiler/brw_nir_lower_cs_intrinsics.c
+++ b/src/intel/compiler/brw_nir_lower_cs_intrinsics.c
@@ -55,20 +55,6 @@ lower_cs_intrinsics_convert_block(struct lower_intrinsics_state *state,
nir_ssa_def *sysval;
switch (intrinsic->intrinsic) {
- case nir_intrinsic_barrier: {
- /* Our HW barrier instruction doesn't do a memory barrier for us but
- * the GLSL barrier() intrinsic does for shared memory. Insert a
- * shared memory barrier before every barrier().
- */
- b->cursor = nir_before_instr(&intrinsic->instr);
-
- nir_intrinsic_instr *shared_barrier =
- nir_intrinsic_instr_create(b->shader,
- nir_intrinsic_memory_barrier_shared);
- nir_builder_instr_insert(b, &shared_barrier->instr);
- continue;
- }
-
case nir_intrinsic_load_local_invocation_index:
case nir_intrinsic_load_local_invocation_id: {
/* First time we are using those, so let's calculate them. */
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