Mesa (master): iris: set depth stall enabled when depth flush enabled on gen12

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Module: Mesa
Branch: master
Commit: 3cec1484552aff22eb4e4300758138be7228187c
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=3cec1484552aff22eb4e4300758138be7228187c

Author: Tapani Pälli <tapani.palli at intel.com>
Date:   Tue Jan 14 10:02:05 2020 +0200

iris: set depth stall enabled when depth flush enabled on gen12

This implements HW workaround #1409600907 for iris driver.

Signed-off-by: Tapani Pälli <tapani.palli at intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3378>

---

 src/gallium/drivers/iris/iris_state.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c
index 7ead920cadf..b1340e1e3da 100644
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -7161,6 +7161,15 @@ iris_emit_raw_pipe_control(struct iris_batch *batch,
          flags |= PIPE_CONTROL_STALL_AT_SCOREBOARD;
    }
 
+   if (GEN_GEN >= 12 && (flags & PIPE_CONTROL_DEPTH_CACHE_FLUSH)) {
+      /* GEN:BUG:1409600907:
+       *
+       * "PIPE_CONTROL with Depth Stall Enable bit must be set
+       * with any PIPE_CONTROL with Depth Flush Enable bit set.
+       */
+      flags |= PIPE_CONTROL_DEPTH_STALL;
+   }
+
    /* Emit --------------------------------------------------------------- */
 
    if (INTEL_DEBUG & DEBUG_PIPE_CONTROL) {