Mesa (master): intel/compiler: Limit compaction unit tests to specific gens

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Wed Jan 22 00:51:23 UTC 2020


Module: Mesa
Branch: master
Commit: 8634286c5da771ea1c8d2e7a2407892af03a083b
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8634286c5da771ea1c8d2e7a2407892af03a083b

Author: Matt Turner <mattst88 at gmail.com>
Date:   Wed Nov  6 10:13:24 2019 -0800

intel/compiler: Limit compaction unit tests to specific gens

Two of the tests emit instructions with MRF destinations, and MRFs
aren't present on Gen7+. I think we were just lucky that this didn't
cause a problem earlier since we were running the tests on Gen7-9.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2635>

---

 src/intel/compiler/test_eu_compact.cpp | 27 ++++++++++++++++++---------
 1 file changed, 18 insertions(+), 9 deletions(-)

diff --git a/src/intel/compiler/test_eu_compact.cpp b/src/intel/compiler/test_eu_compact.cpp
index 7f1f7f4c2be..ec93d2bd142 100644
--- a/src/intel/compiler/test_eu_compact.cpp
+++ b/src/intel/compiler/test_eu_compact.cpp
@@ -26,6 +26,7 @@
 #include <stdbool.h>
 #include "util/ralloc.h"
 #include "brw_eu.h"
+#include "brw_gen_enum.h"
 
 static bool
 test_compact_instruction(struct brw_codegen *p, brw_inst src)
@@ -267,16 +268,17 @@ gen_f0_1_MOV_GRF_GRF(struct brw_codegen *p)
 
 struct {
    void (*func)(struct brw_codegen *p);
+   int gens;
 } tests[] = {
-   { gen_MOV_GRF_GRF },
-   { gen_ADD_GRF_GRF_GRF },
-   { gen_ADD_GRF_GRF_IMM },
-   { gen_ADD_GRF_GRF_IMM_d },
-   { gen_ADD_MRF_GRF_GRF },
-   { gen_ADD_vec1_GRF_GRF_GRF },
-   { gen_PLN_MRF_GRF_GRF },
-   { gen_f0_0_MOV_GRF_GRF },
-   { gen_f0_1_MOV_GRF_GRF },
+   { gen_MOV_GRF_GRF,          GEN_ALL      },
+   { gen_ADD_GRF_GRF_GRF,      GEN_ALL      },
+   { gen_ADD_GRF_GRF_IMM,      GEN_ALL      },
+   { gen_ADD_GRF_GRF_IMM_d,    GEN_ALL      },
+   { gen_ADD_MRF_GRF_GRF,      GEN_LE(GEN6) },
+   { gen_ADD_vec1_GRF_GRF_GRF, GEN_ALL      },
+   { gen_PLN_MRF_GRF_GRF,      GEN_LE(GEN6) },
+   { gen_f0_0_MOV_GRF_GRF,     GEN_ALL      },
+   { gen_f0_1_MOV_GRF_GRF,     GEN_ALL      },
 };
 
 static bool
@@ -286,7 +288,14 @@ run_tests(const struct gen_device_info *devinfo)
    bool fail = false;
 
    for (unsigned i = 0; i < ARRAY_SIZE(tests); i++) {
+      if ((tests[i].gens & gen_from_devinfo(devinfo)) == 0)
+         continue;
+
       for (int align_16 = 0; align_16 <= 1; align_16++) {
+         /* Align16 support is not present on Gen11+ */
+         if (devinfo->gen >= 11 && align_16)
+            continue;
+
 	 struct brw_codegen *p = rzalloc(NULL, struct brw_codegen);
 	 brw_init_codegen(devinfo, p, p);
 



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