Mesa (staging/19.3): radeonsi: disable display DCC

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Module: Mesa
Branch: staging/19.3
Commit: 71274354637633f3217e6a6a699f5ea742479c88
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=71274354637633f3217e6a6a699f5ea742479c88

Author: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Date:   Fri Jan 17 09:37:57 2020 +0100

radeonsi: disable display DCC

Display DCC needs https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2836
to work correctly.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3440>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3440>

---

 src/amd/common/ac_gpu_info.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index 06f09fce74e..584aee7872e 100644
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -595,10 +595,13 @@ bool ac_query_gpu_info(int fd, void *dev_p,
 	    (info->family == CHIP_RAVEN ||
 	     info->family == CHIP_RAVEN2 ||
 	     info->family == CHIP_RENOIR)) {
+		/* Disable display DCC support because it depends
+		* on MR !2836 to work correctly.
+		 */
 		if (info->num_render_backends == 1)
-			info->use_display_dcc_unaligned = true;
+			info->use_display_dcc_unaligned = false;
 		else
-			info->use_display_dcc_with_retile_blit = true;
+			info->use_display_dcc_with_retile_blit = false;
 	}
 
 	info->has_gds_ordered_append = info->chip_class >= GFX7 &&