Mesa (master): freedreno: use PIPE_CAP_RGB_OVERRIDE_DST_ALPHA_BLEND
GitLab Mirror
gitlab-mirror at kemper.freedesktop.org
Wed Jan 29 11:45:08 UTC 2020
Module: Mesa
Branch: master
Commit: d0e0141526c2b3c515bc01fbe2745e13bf3b174c
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d0e0141526c2b3c515bc01fbe2745e13bf3b174c
Author: Rob Clark <robdclark at chromium.org>
Date: Fri Jan 17 13:58:44 2020 -0800
freedreno: use PIPE_CAP_RGB_OVERRIDE_DST_ALPHA_BLEND
This lets us drop a bunch of special handling for xRGB blend.
Signed-off-by: Rob Clark <robdclark at chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3565>
---
src/gallium/drivers/freedreno/a2xx/fd2_blend.c | 9 ++-------
src/gallium/drivers/freedreno/a2xx/fd2_blend.h | 4 +---
src/gallium/drivers/freedreno/a2xx/fd2_emit.c | 16 ++--------------
src/gallium/drivers/freedreno/a3xx/fd3_blend.c | 11 ++---------
src/gallium/drivers/freedreno/a3xx/fd3_blend.h | 7 +------
src/gallium/drivers/freedreno/a3xx/fd3_emit.c | 8 ++------
src/gallium/drivers/freedreno/a4xx/fd4_blend.c | 12 ++----------
src/gallium/drivers/freedreno/a4xx/fd4_blend.h | 7 +------
src/gallium/drivers/freedreno/a4xx/fd4_emit.c | 8 ++------
src/gallium/drivers/freedreno/a5xx/fd5_blend.c | 12 ++----------
src/gallium/drivers/freedreno/a5xx/fd5_blend.h | 7 +------
src/gallium/drivers/freedreno/a5xx/fd5_emit.c | 8 ++------
src/gallium/drivers/freedreno/a6xx/fd6_blend.c | 12 ++----------
src/gallium/drivers/freedreno/a6xx/fd6_blend.h | 8 ++------
src/gallium/drivers/freedreno/a6xx/fd6_emit.c | 8 ++------
src/gallium/drivers/freedreno/freedreno_screen.c | 1 +
16 files changed, 27 insertions(+), 111 deletions(-)
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_blend.c b/src/gallium/drivers/freedreno/a2xx/fd2_blend.c
index 8e03e840fcb..7593eaae482 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_blend.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_blend.c
@@ -78,7 +78,7 @@ fd2_blend_state_create(struct pipe_context *pctx,
so->rb_colorcontrol = A2XX_RB_COLORCONTROL_ROP_CODE(rop);
- so->rb_blendcontrol_rgb =
+ so->rb_blendcontrol =
A2XX_RB_BLEND_CONTROL_COLOR_SRCBLEND(fd_blend_factor(rt->rgb_src_factor)) |
A2XX_RB_BLEND_CONTROL_COLOR_COMB_FCN(blend_func(rt->rgb_func)) |
A2XX_RB_BLEND_CONTROL_COLOR_DESTBLEND(fd_blend_factor(rt->rgb_dst_factor));
@@ -88,16 +88,11 @@ fd2_blend_state_create(struct pipe_context *pctx,
if (alpha_src_factor == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE)
alpha_src_factor = PIPE_BLENDFACTOR_ONE;
- so->rb_blendcontrol_alpha =
+ so->rb_blendcontrol |=
A2XX_RB_BLEND_CONTROL_ALPHA_SRCBLEND(fd_blend_factor(alpha_src_factor)) |
A2XX_RB_BLEND_CONTROL_ALPHA_COMB_FCN(blend_func(rt->alpha_func)) |
A2XX_RB_BLEND_CONTROL_ALPHA_DESTBLEND(fd_blend_factor(rt->alpha_dst_factor));
- so->rb_blendcontrol_no_alpha_rgb =
- A2XX_RB_BLEND_CONTROL_COLOR_SRCBLEND(fd_blend_factor(util_blend_dst_alpha_to_one(rt->rgb_src_factor))) |
- A2XX_RB_BLEND_CONTROL_COLOR_COMB_FCN(blend_func(rt->rgb_func)) |
- A2XX_RB_BLEND_CONTROL_COLOR_DESTBLEND(fd_blend_factor(util_blend_dst_alpha_to_one(rt->rgb_dst_factor)));
-
if (rt->colormask & PIPE_MASK_R)
so->rb_colormask |= A2XX_RB_COLOR_MASK_WRITE_RED;
if (rt->colormask & PIPE_MASK_G)
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_blend.h b/src/gallium/drivers/freedreno/a2xx/fd2_blend.h
index fd78519464f..9fe6e6e248e 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_blend.h
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_blend.h
@@ -32,9 +32,7 @@
struct fd2_blend_stateobj {
struct pipe_blend_state base;
- uint32_t rb_blendcontrol_rgb;
- uint32_t rb_blendcontrol_alpha;
- uint32_t rb_blendcontrol_no_alpha_rgb;
+ uint32_t rb_blendcontrol;
uint32_t rb_colorcontrol; /* must be OR'd w/ zsa->rb_colorcontrol */
uint32_t rb_colormask;
};
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_emit.c b/src/gallium/drivers/freedreno/a2xx/fd2_emit.c
index 227ba86ed81..a463507cda1 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_emit.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_emit.c
@@ -217,15 +217,9 @@ fd2_emit_state_binning(struct fd_context *ctx, const enum fd_dirty_3d_state dirt
/* not sure why this is needed */
if (dirty & (FD_DIRTY_BLEND | FD_DIRTY_FRAMEBUFFER)) {
- enum pipe_format format =
- pipe_surface_format(ctx->batch->framebuffer.cbufs[0]);
- bool has_alpha = util_format_has_alpha(format);
-
OUT_PKT3(ring, CP_SET_CONSTANT, 2);
OUT_RING(ring, CP_REG(REG_A2XX_RB_BLEND_CONTROL));
- OUT_RING(ring, blend->rb_blendcontrol_alpha |
- COND(has_alpha, blend->rb_blendcontrol_rgb) |
- COND(!has_alpha, blend->rb_blendcontrol_no_alpha_rgb));
+ OUT_RING(ring, blend->rb_blendcontrol);
OUT_PKT3(ring, CP_SET_CONSTANT, 2);
OUT_RING(ring, CP_REG(REG_A2XX_RB_COLOR_MASK));
@@ -376,15 +370,9 @@ fd2_emit_state(struct fd_context *ctx, const enum fd_dirty_3d_state dirty)
}
if (dirty & (FD_DIRTY_BLEND | FD_DIRTY_FRAMEBUFFER)) {
- enum pipe_format format =
- pipe_surface_format(ctx->batch->framebuffer.cbufs[0]);
- bool has_alpha = util_format_has_alpha(format);
-
OUT_PKT3(ring, CP_SET_CONSTANT, 2);
OUT_RING(ring, CP_REG(REG_A2XX_RB_BLEND_CONTROL));
- OUT_RING(ring, blend->rb_blendcontrol_alpha |
- COND(has_alpha, blend->rb_blendcontrol_rgb) |
- COND(!has_alpha, blend->rb_blendcontrol_no_alpha_rgb));
+ OUT_RING(ring, blend->rb_blendcontrol);
OUT_PKT3(ring, CP_SET_CONSTANT, 2);
OUT_RING(ring, CP_REG(REG_A2XX_RB_COLOR_MASK));
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_blend.c b/src/gallium/drivers/freedreno/a3xx/fd3_blend.c
index ec1dff3e17b..383e557f18e 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_blend.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_blend.c
@@ -98,21 +98,14 @@ fd3_blend_state_create(struct pipe_context *pctx,
else
rt = &cso->rt[0];
- so->rb_mrt[i].blend_control_rgb =
+ so->rb_mrt[i].blend_control =
A3XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(fd_blend_factor(rt->rgb_src_factor)) |
A3XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(blend_func(rt->rgb_func)) |
- A3XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(fd_blend_factor(rt->rgb_dst_factor));
-
- so->rb_mrt[i].blend_control_alpha =
+ A3XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(fd_blend_factor(rt->rgb_dst_factor)) |
A3XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(fd_blend_factor(rt->alpha_src_factor)) |
A3XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(blend_func(rt->alpha_func)) |
A3XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(fd_blend_factor(rt->alpha_dst_factor));
- so->rb_mrt[i].blend_control_no_alpha_rgb =
- A3XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(fd_blend_factor(util_blend_dst_alpha_to_one(rt->rgb_src_factor))) |
- A3XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(blend_func(rt->rgb_func)) |
- A3XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(fd_blend_factor(util_blend_dst_alpha_to_one(rt->rgb_dst_factor)));
-
so->rb_mrt[i].control =
A3XX_RB_MRT_CONTROL_ROP_CODE(rop) |
A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE(rt->colormask);
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_blend.h b/src/gallium/drivers/freedreno/a3xx/fd3_blend.h
index df249245a6a..61fbeda594b 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_blend.h
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_blend.h
@@ -36,12 +36,7 @@ struct fd3_blend_stateobj {
struct pipe_blend_state base;
uint32_t rb_render_control;
struct {
- /* Blend control bits for color if there is an alpha channel */
- uint32_t blend_control_rgb;
- /* Blend control bits for color if there is no alpha channel */
- uint32_t blend_control_no_alpha_rgb;
- /* Blend control bits for alpha channel */
- uint32_t blend_control_alpha;
+ uint32_t blend_control;
uint32_t control;
} rb_mrt[A3XX_MAX_RENDER_TARGETS];
};
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
index af147859942..6509435636c 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
@@ -735,7 +735,6 @@ fd3_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
bool is_int = util_format_is_pure_integer(format);
bool has_alpha = util_format_has_alpha(format);
uint32_t control = blend->rb_mrt[i].control;
- uint32_t blend_control = blend->rb_mrt[i].blend_control_alpha;
if (is_int) {
control &= (A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE__MASK |
@@ -746,10 +745,7 @@ fd3_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
if (format == PIPE_FORMAT_NONE)
control &= ~A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE__MASK;
- if (has_alpha) {
- blend_control |= blend->rb_mrt[i].blend_control_rgb;
- } else {
- blend_control |= blend->rb_mrt[i].blend_control_no_alpha_rgb;
+ if (!has_alpha) {
control &= ~A3XX_RB_MRT_CONTROL_BLEND2;
}
@@ -769,7 +765,7 @@ fd3_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
OUT_RING(ring, control);
OUT_PKT0(ring, REG_A3XX_RB_MRT_BLEND_CONTROL(i), 1);
- OUT_RING(ring, blend_control |
+ OUT_RING(ring, blend->rb_mrt[i].blend_control |
COND(!is_float, A3XX_RB_MRT_BLEND_CONTROL_CLAMP_ENABLE));
}
}
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_blend.c b/src/gallium/drivers/freedreno/a4xx/fd4_blend.c
index 6c9fb3dd49a..9a728088192 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_blend.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_blend.c
@@ -97,22 +97,14 @@ fd4_blend_state_create(struct pipe_context *pctx,
else
rt = &cso->rt[0];
- so->rb_mrt[i].blend_control_rgb =
+ so->rb_mrt[i].blend_control =
A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(fd_blend_factor(rt->rgb_src_factor)) |
A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(blend_func(rt->rgb_func)) |
- A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(fd_blend_factor(rt->rgb_dst_factor));
-
- so->rb_mrt[i].blend_control_alpha =
+ A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(fd_blend_factor(rt->rgb_dst_factor)) |
A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(fd_blend_factor(rt->alpha_src_factor)) |
A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(blend_func(rt->alpha_func)) |
A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(fd_blend_factor(rt->alpha_dst_factor));
- so->rb_mrt[i].blend_control_no_alpha_rgb =
- A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(fd_blend_factor(util_blend_dst_alpha_to_one(rt->rgb_src_factor))) |
- A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(blend_func(rt->rgb_func)) |
- A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(fd_blend_factor(util_blend_dst_alpha_to_one(rt->rgb_dst_factor)));
-
-
so->rb_mrt[i].control =
A4XX_RB_MRT_CONTROL_ROP_CODE(rop) |
COND(cso->logicop_enable, A4XX_RB_MRT_CONTROL_ROP_ENABLE) |
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_blend.h b/src/gallium/drivers/freedreno/a4xx/fd4_blend.h
index 0db0b35a008..74364ce1fdc 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_blend.h
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_blend.h
@@ -37,12 +37,7 @@ struct fd4_blend_stateobj {
struct {
uint32_t control;
uint32_t buf_info;
- /* Blend control bits for color if there is an alpha channel */
- uint32_t blend_control_rgb;
- /* Blend control bits for color if there is no alpha channel */
- uint32_t blend_control_no_alpha_rgb;
- /* Blend control bits for alpha channel */
- uint32_t blend_control_alpha;
+ uint32_t blend_control;
} rb_mrt[A4XX_MAX_RENDER_TARGETS];
uint32_t rb_fs_output;
};
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
index 7a188c68afc..8d07ceff9bb 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
@@ -697,17 +697,13 @@ fd4_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
bool is_int = util_format_is_pure_integer(format);
bool has_alpha = util_format_has_alpha(format);
uint32_t control = blend->rb_mrt[i].control;
- uint32_t blend_control = blend->rb_mrt[i].blend_control_alpha;
if (is_int) {
control &= A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE__MASK;
control |= A4XX_RB_MRT_CONTROL_ROP_CODE(ROP_COPY);
}
- if (has_alpha) {
- blend_control |= blend->rb_mrt[i].blend_control_rgb;
- } else {
- blend_control |= blend->rb_mrt[i].blend_control_no_alpha_rgb;
+ if (!has_alpha) {
control &= ~A4XX_RB_MRT_CONTROL_BLEND2;
}
@@ -715,7 +711,7 @@ fd4_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
OUT_RING(ring, control);
OUT_PKT0(ring, REG_A4XX_RB_MRT_BLEND_CONTROL(i), 1);
- OUT_RING(ring, blend_control);
+ OUT_RING(ring, blend->rb_mrt[i].blend_control);
}
OUT_PKT0(ring, REG_A4XX_RB_FS_OUTPUT, 1);
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_blend.c b/src/gallium/drivers/freedreno/a5xx/fd5_blend.c
index fee6ba346b7..a7efcca6187 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_blend.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_blend.c
@@ -100,22 +100,14 @@ fd5_blend_state_create(struct pipe_context *pctx,
else
rt = &cso->rt[0];
- so->rb_mrt[i].blend_control_rgb =
+ so->rb_mrt[i].blend_control =
A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(fd_blend_factor(rt->rgb_src_factor)) |
A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(blend_func(rt->rgb_func)) |
- A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(fd_blend_factor(rt->rgb_dst_factor));
-
- so->rb_mrt[i].blend_control_alpha =
+ A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(fd_blend_factor(rt->rgb_dst_factor)) |
A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(fd_blend_factor(rt->alpha_src_factor)) |
A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(blend_func(rt->alpha_func)) |
A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(fd_blend_factor(rt->alpha_dst_factor));
- so->rb_mrt[i].blend_control_no_alpha_rgb =
- A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(fd_blend_factor(util_blend_dst_alpha_to_one(rt->rgb_src_factor))) |
- A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(blend_func(rt->rgb_func)) |
- A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(fd_blend_factor(util_blend_dst_alpha_to_one(rt->rgb_dst_factor)));
-
-
so->rb_mrt[i].control =
A5XX_RB_MRT_CONTROL_ROP_CODE(rop) |
COND(cso->logicop_enable, A5XX_RB_MRT_CONTROL_ROP_ENABLE) |
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_blend.h b/src/gallium/drivers/freedreno/a5xx/fd5_blend.h
index 69854954857..10cbbaa906c 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_blend.h
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_blend.h
@@ -38,12 +38,7 @@ struct fd5_blend_stateobj {
struct {
uint32_t control;
uint32_t buf_info;
- /* Blend control bits for color if there is an alpha channel */
- uint32_t blend_control_rgb;
- /* Blend control bits for color if there is no alpha channel */
- uint32_t blend_control_no_alpha_rgb;
- /* Blend control bits for alpha channel */
- uint32_t blend_control_alpha;
+ uint32_t blend_control;
} rb_mrt[A5XX_MAX_RENDER_TARGETS];
uint32_t rb_blend_cntl;
uint32_t sp_blend_cntl;
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_emit.c b/src/gallium/drivers/freedreno/a5xx/fd5_emit.c
index 9b337d33de2..5bd429ef61a 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_emit.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_emit.c
@@ -725,17 +725,13 @@ fd5_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
bool is_int = util_format_is_pure_integer(format);
bool has_alpha = util_format_has_alpha(format);
uint32_t control = blend->rb_mrt[i].control;
- uint32_t blend_control = blend->rb_mrt[i].blend_control_alpha;
if (is_int) {
control &= A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE__MASK;
control |= A5XX_RB_MRT_CONTROL_ROP_CODE(ROP_COPY);
}
- if (has_alpha) {
- blend_control |= blend->rb_mrt[i].blend_control_rgb;
- } else {
- blend_control |= blend->rb_mrt[i].blend_control_no_alpha_rgb;
+ if (!has_alpha) {
control &= ~A5XX_RB_MRT_CONTROL_BLEND2;
}
@@ -743,7 +739,7 @@ fd5_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
OUT_RING(ring, control);
OUT_PKT4(ring, REG_A5XX_RB_MRT_BLEND_CONTROL(i), 1);
- OUT_RING(ring, blend_control);
+ OUT_RING(ring, blend->rb_mrt[i].blend_control);
}
OUT_PKT4(ring, REG_A5XX_SP_BLEND_CNTL, 1);
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_blend.c b/src/gallium/drivers/freedreno/a6xx/fd6_blend.c
index 6f1ea5e2f79..0a9d5f4acc1 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_blend.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_blend.c
@@ -101,22 +101,14 @@ fd6_blend_state_create(struct pipe_context *pctx,
else
rt = &cso->rt[0];
- so->rb_mrt[i].blend_control_rgb =
+ so->rb_mrt[i].blend_control=
A6XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(fd_blend_factor(rt->rgb_src_factor)) |
A6XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(blend_func(rt->rgb_func)) |
- A6XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(fd_blend_factor(rt->rgb_dst_factor));
-
- so->rb_mrt[i].blend_control_alpha =
+ A6XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(fd_blend_factor(rt->rgb_dst_factor)) |
A6XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(fd_blend_factor(rt->alpha_src_factor)) |
A6XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(blend_func(rt->alpha_func)) |
A6XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(fd_blend_factor(rt->alpha_dst_factor));
- so->rb_mrt[i].blend_control_no_alpha_rgb =
- A6XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(fd_blend_factor(util_blend_dst_alpha_to_one(rt->rgb_src_factor))) |
- A6XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(blend_func(rt->rgb_func)) |
- A6XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(fd_blend_factor(util_blend_dst_alpha_to_one(rt->rgb_dst_factor)));
-
-
so->rb_mrt[i].control =
A6XX_RB_MRT_CONTROL_ROP_CODE(rop) |
COND(cso->logicop_enable, A6XX_RB_MRT_CONTROL_ROP_ENABLE) |
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_blend.h b/src/gallium/drivers/freedreno/a6xx/fd6_blend.h
index e207000bed1..878178d0ec7 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_blend.h
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_blend.h
@@ -31,6 +31,7 @@
#include "pipe/p_state.h"
#include "pipe/p_context.h"
+#include "freedreno_context.h"
#include "freedreno_util.h"
struct fd6_blend_stateobj {
@@ -39,12 +40,7 @@ struct fd6_blend_stateobj {
struct {
uint32_t control;
uint32_t buf_info;
- /* Blend control bits for color if there is an alpha channel */
- uint32_t blend_control_rgb;
- /* Blend control bits for color if there is no alpha channel */
- uint32_t blend_control_no_alpha_rgb;
- /* Blend control bits for alpha channel */
- uint32_t blend_control_alpha;
+ uint32_t blend_control;
} rb_mrt[A6XX_MAX_RENDER_TARGETS];
uint32_t rb_blend_cntl;
uint32_t rb_dither_cntl;
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
index 9fb0125409e..087b537f10f 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
@@ -1082,17 +1082,13 @@ fd6_emit_state(struct fd_ringbuffer *ring, struct fd6_emit *emit)
bool is_int = util_format_is_pure_integer(format);
bool has_alpha = util_format_has_alpha(format);
uint32_t control = blend->rb_mrt[i].control;
- uint32_t blend_control = blend->rb_mrt[i].blend_control_alpha;
if (is_int) {
control &= A6XX_RB_MRT_CONTROL_COMPONENT_ENABLE__MASK;
control |= A6XX_RB_MRT_CONTROL_ROP_CODE(ROP_COPY);
}
- if (has_alpha) {
- blend_control |= blend->rb_mrt[i].blend_control_rgb;
- } else {
- blend_control |= blend->rb_mrt[i].blend_control_no_alpha_rgb;
+ if (!has_alpha) {
control &= ~A6XX_RB_MRT_CONTROL_BLEND2;
}
@@ -1100,7 +1096,7 @@ fd6_emit_state(struct fd_ringbuffer *ring, struct fd6_emit *emit)
OUT_RING(ring, control);
OUT_PKT4(ring, REG_A6XX_RB_MRT_BLEND_CONTROL(i), 1);
- OUT_RING(ring, blend_control);
+ OUT_RING(ring, blend->rb_mrt[i].blend_control);
}
OUT_PKT4(ring, REG_A6XX_RB_DITHER_CNTL, 1);
diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c
index d467cae6b00..9bdc0cc260c 100644
--- a/src/gallium/drivers/freedreno/freedreno_screen.c
+++ b/src/gallium/drivers/freedreno/freedreno_screen.c
@@ -197,6 +197,7 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
case PIPE_CAP_TEXTURE_BARRIER:
case PIPE_CAP_INVALIDATE_BUFFER:
+ case PIPE_CAP_RGB_OVERRIDE_DST_ALPHA_BLEND:
return 1;
case PIPE_CAP_PACKED_UNIFORMS:
More information about the mesa-commit
mailing list