Mesa (master): anv: Plumb deref block size through to 3DSTATE_SF
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Fri Jan 31 05:36:38 UTC 2020
Module: Mesa
Branch: master
Commit: e6b39850f092b387881c4fb4260c9465971422aa
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e6b39850f092b387881c4fb4260c9465971422aa
Author: Jason Ekstrand <jason at jlekstrand.net>
Date: Fri Jan 17 14:14:03 2020 -0600
anv: Plumb deref block size through to 3DSTATE_SF
Cc: "20.0" mesa-stable at lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
---
src/intel/vulkan/anv_genX.h | 3 ++-
src/intel/vulkan/anv_private.h | 2 +-
src/intel/vulkan/genX_gpu_memcpy.c | 2 +-
src/intel/vulkan/genX_pipeline.c | 22 ++++++++++++++--------
4 files changed, 18 insertions(+), 11 deletions(-)
diff --git a/src/intel/vulkan/anv_genX.h b/src/intel/vulkan/anv_genX.h
index 142b0837100..eeb95ff823b 100644
--- a/src/intel/vulkan/anv_genX.h
+++ b/src/intel/vulkan/anv_genX.h
@@ -84,7 +84,8 @@ void
genX(emit_urb_setup)(struct anv_device *device, struct anv_batch *batch,
const struct gen_l3_config *l3_config,
VkShaderStageFlags active_stages,
- const unsigned entry_size[4]);
+ const unsigned entry_size[4],
+ enum gen_urb_deref_block_size *deref_block_size);
void genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer,
struct anv_address dst, struct anv_address src,
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 4c8f58e5f34..ad7612ca611 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -46,6 +46,7 @@
#include "common/gen_clflush.h"
#include "common/gen_decoder.h"
#include "common/gen_gem.h"
+#include "common/gen_l3_config.h"
#include "dev/gen_device_info.h"
#include "blorp/blorp.h"
#include "compiler/brw_compiler.h"
@@ -76,7 +77,6 @@ struct anv_image_view;
struct anv_instance;
struct gen_aux_map_context;
-struct gen_l3_config;
struct gen_perf_config;
#include <vulkan/vulkan.h>
diff --git a/src/intel/vulkan/genX_gpu_memcpy.c b/src/intel/vulkan/genX_gpu_memcpy.c
index 28de5def12d..50d0894b93c 100644
--- a/src/intel/vulkan/genX_gpu_memcpy.c
+++ b/src/intel/vulkan/genX_gpu_memcpy.c
@@ -147,7 +147,7 @@ genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer,
genX(emit_urb_setup)(cmd_buffer->device, &cmd_buffer->batch,
cmd_buffer->state.current_l3_config,
- VK_SHADER_STAGE_VERTEX_BIT, entry_size);
+ VK_SHADER_STAGE_VERTEX_BIT, entry_size, NULL);
anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_SO_BUFFER), sob) {
#if GEN_GEN < 12
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index 2dd4592381d..82c053d91a5 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
@@ -259,7 +259,8 @@ void
genX(emit_urb_setup)(struct anv_device *device, struct anv_batch *batch,
const struct gen_l3_config *l3_config,
VkShaderStageFlags active_stages,
- const unsigned entry_size[4])
+ const unsigned entry_size[4],
+ enum gen_urb_deref_block_size *deref_block_size)
{
const struct gen_device_info *devinfo = &device->info;
@@ -269,7 +270,7 @@ genX(emit_urb_setup)(struct anv_device *device, struct anv_batch *batch,
active_stages &
VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT,
active_stages & VK_SHADER_STAGE_GEOMETRY_BIT,
- entry_size, entries, start, NULL);
+ entry_size, entries, start, deref_block_size);
#if GEN_GEN == 7 && !GEN_IS_HASWELL
/* From the IVB PRM Vol. 2, Part 1, Section 3.2.1:
@@ -298,7 +299,8 @@ genX(emit_urb_setup)(struct anv_device *device, struct anv_batch *batch,
}
static void
-emit_urb_setup(struct anv_pipeline *pipeline)
+emit_urb_setup(struct anv_pipeline *pipeline,
+ enum gen_urb_deref_block_size *deref_block_size)
{
unsigned entry_size[4];
for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
@@ -311,7 +313,8 @@ emit_urb_setup(struct anv_pipeline *pipeline)
genX(emit_urb_setup)(pipeline->device, &pipeline->batch,
pipeline->urb.l3_config,
- pipeline->active_stages, entry_size);
+ pipeline->active_stages, entry_size,
+ deref_block_size);
}
static void
@@ -565,7 +568,8 @@ emit_rs_state(struct anv_pipeline *pipeline,
const VkPipelineMultisampleStateCreateInfo *ms_info,
const VkPipelineRasterizationLineStateCreateInfoEXT *line_info,
const struct anv_render_pass *pass,
- const struct anv_subpass *subpass)
+ const struct anv_subpass *subpass,
+ enum gen_urb_deref_block_size urb_deref_block_size)
{
struct GENX(3DSTATE_SF) sf = {
GENX(3DSTATE_SF_header),
@@ -584,7 +588,7 @@ emit_rs_state(struct anv_pipeline *pipeline,
#endif
#if GEN_GEN >= 12
- sf.DerefBlockSize = PerPolyDerefMode;
+ sf.DerefBlockSize = urb_deref_block_size;
#endif
const struct brw_vue_prog_data *last_vue_prog_data =
@@ -2144,14 +2148,16 @@ genX(graphics_pipeline_create)(
vk_find_struct_const(pCreateInfo->pRasterizationState->pNext,
PIPELINE_RASTERIZATION_LINE_STATE_CREATE_INFO_EXT);
- emit_urb_setup(pipeline);
+ enum gen_urb_deref_block_size urb_deref_block_size;
+ emit_urb_setup(pipeline, &urb_deref_block_size);
assert(pCreateInfo->pVertexInputState);
emit_vertex_input(pipeline, pCreateInfo->pVertexInputState);
assert(pCreateInfo->pRasterizationState);
emit_rs_state(pipeline, pCreateInfo->pInputAssemblyState,
pCreateInfo->pRasterizationState,
- ms_info, line_info, pass, subpass);
+ ms_info, line_info, pass, subpass,
+ urb_deref_block_size);
emit_ms_state(pipeline, ms_info);
emit_ds_state(pipeline, ds_info, pass, subpass);
emit_cb_state(pipeline, cb_info, ms_info);
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