Mesa (master): ir3: use empirical size for params as used by the shader

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 836d41d77265a2d2ca42bdbfd25de07b9bb134c9
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=836d41d77265a2d2ca42bdbfd25de07b9bb134c9

Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date:   Sun Jul  5 01:58:01 2020 -0400

ir3: use empirical size for params as used by the shader

For example only some UCPs may be used by the shader, triggering asserts
that too many consts are being uploaded.

While we're at it, also fix the const size when loading UCPs, since
otherwise it doesn't correspond to what the shader is actually using.

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Rob Clark <robdclark at chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5752>

---

 src/freedreno/ir3/ir3_nir.c                   |  3 ++-
 src/gallium/drivers/freedreno/ir3/ir3_const.h | 15 ++++++++-------
 2 files changed, 10 insertions(+), 8 deletions(-)

diff --git a/src/freedreno/ir3/ir3_nir.c b/src/freedreno/ir3/ir3_nir.c
index 5707cbcb66f..196c99f3024 100644
--- a/src/freedreno/ir3/ir3_nir.c
+++ b/src/freedreno/ir3/ir3_nir.c
@@ -483,8 +483,9 @@ ir3_nir_scan_driver_consts(nir_shader *shader,
 						MAX2(layout->num_driver_params, IR3_DP_INSTID_BASE + 1);
 					break;
 				case nir_intrinsic_load_user_clip_plane:
+					idx = nir_intrinsic_ucp_id(intr);
 					layout->num_driver_params =
-						MAX2(layout->num_driver_params, IR3_DP_UCP7_W + 1);
+						MAX2(layout->num_driver_params, IR3_DP_UCP0_X + (idx + 1) * 4);
 					break;
 				case nir_intrinsic_load_num_work_groups:
 					layout->num_driver_params =
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_const.h b/src/gallium/drivers/freedreno/ir3/ir3_const.h
index 1bcd53b66b0..1bb19b63cea 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_const.h
+++ b/src/gallium/drivers/freedreno/ir3/ir3_const.h
@@ -451,11 +451,6 @@ ir3_emit_vs_driver_params(const struct ir3_shader_variant *v,
 					info->index_bias : info->start,
 					[IR3_DP_VTXCNT_MAX] = max_tf_vtx(ctx, v),
 	};
-	/* if no user-clip-planes, we don't need to emit the
-	 * entire thing:
-	 */
-	uint32_t vertex_params_size = 4;
-
 	if (v->key.ucp_enables) {
 		struct pipe_clip_state *ucp = &ctx->ucp;
 		unsigned pos = IR3_DP_UCP0_X;
@@ -465,10 +460,16 @@ ir3_emit_vs_driver_params(const struct ir3_shader_variant *v,
 				pos++;
 			}
 		}
-		vertex_params_size = ARRAY_SIZE(vertex_params);
 	}
 
-	vertex_params_size = MAX2(vertex_params_size, const_state->num_driver_params);
+	/* Only emit as many params as needed, i.e. up to the highest enabled UCP
+	 * plane. However a binning pass may drop even some of these, so limit to
+	 * program max.
+	 */
+	const uint32_t vertex_params_size = MIN2(
+			const_state->num_driver_params,
+			(v->constlen - offset) * 4);
+	assert(vertex_params_size <= IR3_DP_VS_COUNT);
 
 	bool needs_vtxid_base =
 		ir3_find_sysval_regid(v, SYSTEM_VALUE_VERTEX_ID_ZERO_BASE) != regid(63, 0);