Mesa (master): radv: set depth/stencil enable values correctly for the meta clear path

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Module: Mesa
Branch: master
Commit: 84ed2793ebdd2e5d60edc62abdef2881e703055c
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=84ed2793ebdd2e5d60edc62abdef2881e703055c

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Wed Jul  8 13:12:37 2020 +0200

radv: set depth/stencil enable values correctly for the meta clear path

They are booleans.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5803>

---

 src/amd/vulkan/radv_meta_clear.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
index fa3832e70ea..4d4dd109165 100644
--- a/src/amd/vulkan/radv_meta_clear.c
+++ b/src/amd/vulkan/radv_meta_clear.c
@@ -664,11 +664,11 @@ create_depthstencil_pipeline(struct radv_device *device,
 
 	const VkPipelineDepthStencilStateCreateInfo ds_state = {
 		.sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
-		.depthTestEnable = (aspects & VK_IMAGE_ASPECT_DEPTH_BIT),
+		.depthTestEnable = !!(aspects & VK_IMAGE_ASPECT_DEPTH_BIT),
 		.depthCompareOp = VK_COMPARE_OP_ALWAYS,
-		.depthWriteEnable = (aspects & VK_IMAGE_ASPECT_DEPTH_BIT),
+		.depthWriteEnable = !!(aspects & VK_IMAGE_ASPECT_DEPTH_BIT),
 		.depthBoundsTestEnable = false,
-		.stencilTestEnable = (aspects & VK_IMAGE_ASPECT_STENCIL_BIT),
+		.stencilTestEnable = !!(aspects & VK_IMAGE_ASPECT_STENCIL_BIT),
 		.front = {
 			.passOp = VK_STENCIL_OP_REPLACE,
 			.compareOp = VK_COMPARE_OP_ALWAYS,