Mesa (master): radv: adjust IA_MULTI_VGT_PARAM.PARTIAL_VS_WAVE at draw time

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Module: Mesa
Branch: master
Commit: 972081c6887442746255f5ddd0300317e59aac04
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=972081c6887442746255f5ddd0300317e59aac04

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Tue Jul  7 18:10:40 2020 +0200

radv: adjust IA_MULTI_VGT_PARAM.PARTIAL_VS_WAVE at draw time

In preparation for the dynamic topology state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5801>

---

 src/amd/vulkan/radv_pipeline.c | 16 ++--------------
 src/amd/vulkan/si_cmd_buffer.c | 11 +++++++++++
 2 files changed, 13 insertions(+), 14 deletions(-)

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index a970c9ef66d..03a73794ecb 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -4665,8 +4665,7 @@ radv_pipeline_generate_pm4(struct radv_pipeline *pipeline,
 
 static struct radv_ia_multi_vgt_param_helpers
 radv_compute_ia_multi_vgt_param_helpers(struct radv_pipeline *pipeline,
-                                        const struct radv_tessellation_state *tess,
-                                        uint32_t prim)
+                                        const struct radv_tessellation_state *tess)
 {
 	struct radv_ia_multi_vgt_param_helpers ia_multi_vgt_param = {0};
 	const struct radv_device *device = pipeline->device;
@@ -4716,17 +4715,6 @@ radv_compute_ia_multi_vgt_param_helpers(struct radv_pipeline *pipeline,
 		}
 	}
 
-	/* Workaround for a VGT hang when strip primitive types are used with
-	 * primitive restart.
-	 */
-	if (pipeline->graphics.prim_restart_enable &&
-	    (prim == V_008958_DI_PT_LINESTRIP ||
-	     prim == V_008958_DI_PT_TRISTRIP ||
-	     prim == V_008958_DI_PT_LINESTRIP_ADJ ||
-	     prim == V_008958_DI_PT_TRISTRIP_ADJ)) {
-		ia_multi_vgt_param.partial_vs_wave = true;
-	}
-
 	if (radv_pipeline_has_gs(pipeline)) {
 		/* On these chips there is the possibility of a hang if the
 		 * pipeline uses a GS and partial_vs_wave is not set.
@@ -5134,7 +5122,7 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
 		tess = calculate_tess_state(pipeline, pCreateInfo);
 	}
 
-	pipeline->graphics.ia_multi_vgt_param = radv_compute_ia_multi_vgt_param_helpers(pipeline, &tess, prim);
+	pipeline->graphics.ia_multi_vgt_param = radv_compute_ia_multi_vgt_param_helpers(pipeline, &tess);
 
 	radv_compute_vertex_input_state(pipeline, pCreateInfo);
 
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
index c3ac17a87e2..87256eda926 100644
--- a/src/amd/vulkan/si_cmd_buffer.c
+++ b/src/amd/vulkan/si_cmd_buffer.c
@@ -797,6 +797,17 @@ si_get_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer,
 		}
 	}
 
+	/* Workaround for a VGT hang when strip primitive types are used with
+	 * primitive restart.
+	 */
+	if (cmd_buffer->state.pipeline->graphics.prim_restart_enable &&
+	    (topology == V_008958_DI_PT_LINESTRIP ||
+	     topology == V_008958_DI_PT_TRISTRIP ||
+	     topology == V_008958_DI_PT_LINESTRIP_ADJ ||
+	     topology == V_008958_DI_PT_TRISTRIP_ADJ)) {
+		partial_vs_wave = true;
+	}
+
 	return cmd_buffer->state.pipeline->graphics.ia_multi_vgt_param.base |
 		S_028AA8_SWITCH_ON_EOP(ia_switch_on_eop) |
 		S_028AA8_SWITCH_ON_EOI(ia_switch_on_eoi) |