Mesa (master): ir3: Handle gl_FragStencilRefARB

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Module: Mesa
Branch: master
Commit: aeca92ed7984baed231297bd72d725ecd989ffa2
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=aeca92ed7984baed231297bd72d725ecd989ffa2

Author: Connor Abbott <cwabbott0 at gmail.com>
Date:   Thu Jul 16 15:47:27 2020 +0200

ir3: Handle gl_FragStencilRefARB

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5936>

---

 src/freedreno/ir3/ir3_compiler_nir.c | 3 +++
 src/freedreno/ir3/ir3_shader.h       | 2 +-
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c
index 2a5db029872..acfe4341ccd 100644
--- a/src/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/freedreno/ir3/ir3_compiler_nir.c
@@ -3209,6 +3209,9 @@ setup_output(struct ir3_context *ctx, nir_variable *out)
 		case FRAG_RESULT_SAMPLE_MASK:
 			so->writes_smask = true;
 			break;
+		case FRAG_RESULT_STENCIL:
+			so->writes_stencilref = true;
+			break;
 		default:
 			slot += out->data.index; /* For dual-src blend */
 			if (slot >= FRAG_RESULT_DATA0)
diff --git a/src/freedreno/ir3/ir3_shader.h b/src/freedreno/ir3/ir3_shader.h
index f5810847112..f5a73bb2e00 100644
--- a/src/freedreno/ir3/ir3_shader.h
+++ b/src/freedreno/ir3/ir3_shader.h
@@ -564,7 +564,7 @@ struct ir3_shader_variant {
 		uint8_t regid;
 		bool    half : 1;
 	} outputs[32 + 2];  /* +POSITION +PSIZE */
-	bool writes_pos, writes_smask, writes_psize;
+	bool writes_pos, writes_smask, writes_psize, writes_stencilref;
 
 	/* Size in dwords of all outputs for VS, size of entire patch for HS. */
 	uint32_t output_size;