Mesa (master): freedreno: Clean up CP_DRAW_MULTI_INDIRECT definition

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Module: Mesa
Branch: master
Commit: 8da31ee15ff8a90d15734615571acc82f2aa7706
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8da31ee15ff8a90d15734615571acc82f2aa7706

Author: Connor Abbott <cwabbott0 at gmail.com>
Date:   Mon Jul 20 16:55:59 2020 +0200

freedreno: Clean up CP_DRAW_MULTI_INDIRECT definition

Depends on the envytools changes to make the "addvariant" magic work in
order to decode this correctly, and to be able to print the register
names directly.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6007>

---

 src/freedreno/registers/adreno_pm4.xml | 27 ++++++++++++---------------
 1 file changed, 12 insertions(+), 15 deletions(-)

diff --git a/src/freedreno/registers/adreno_pm4.xml b/src/freedreno/registers/adreno_pm4.xml
index 5bdca471a2d..b33625b7fc0 100644
--- a/src/freedreno/registers/adreno_pm4.xml
+++ b/src/freedreno/registers/adreno_pm4.xml
@@ -797,7 +797,7 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords)
 	</enum>
 	<reg32 offset="0" name="0" type="vgt_draw_initiator_a4xx"/>
 	<reg32 offset="1" name="1">
-		<bitfield name="OPCODE" low="0" high="3" type="a6xx_draw_indirect_opcode"/>
+		<bitfield name="OPCODE" low="0" high="3" type="a6xx_draw_indirect_opcode" addvariant="yes"/>
 		<doc>
 		DST_OFF same as in CP_LOAD_STATE6 - vec4 VS const at this offset will
 		be updated for each draw to {draw_id, first_vertex, first_instance, 0}
@@ -805,20 +805,17 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords)
 		</doc>
 		<bitfield name="DST_OFF" low="8" high="21" type="hex"/>
 	</reg32>
-	<reg32 offset="2" name="2">
-		<bitfield name="DRAW_COUNT" low="0" high="31" type="hex"/>
-	</reg32>
-	<doc>for opcode 2: indirect address. for opcode 4: index address</doc>
-	<reg64 offset="3" name="ADDRESS_0" type="address"/>
-	<reg32 offset="5" name="5">
-		<doc>for opcode 2: stride. for opcode 4: max_indices</doc>
-		<bitfield name="PARAM_0" low="0" high="31" type="hex"/>
-	</reg32>
-	<doc>last 3 dwords only for opcode 4</doc>
-	<reg64 offset="6" name="INDIRECT" type="address"/>
-	<reg32 offset="8" name="8">
-		<bitfield name="STRIDE" low="0" high="31" type="hex"/>
-	</reg32>
+	<reg32 offset="2" name="DRAW_COUNT" type="uint"/>
+	<stripe varset="a6xx_draw_indirect_opcode" variants="INDIRECT_OP_NORMAL">
+		<reg64 offset="3" name="INDIRECT" type="address"/>
+		<reg32 offset="5" name="STRIDE" type="uint"/>
+	</stripe>
+	<stripe varset="a6xx_draw_indirect_opcode" variants="INDIRECT_OP_INDEXED">
+		<reg64 offset="3" name="INDEX" type="address"/>
+		<reg32 offset="5" name="MAX_INDICES" type="uint"/>
+		<reg64 offset="6" name="INDIRECT" type="address"/>
+		<reg32 offset="8" name="STRIDE" type="uint"/>
+	</stripe>
 </domain>
 
 <domain name="CP_SET_DRAW_STATE" width="32" varset="chip" variants="A4XX-">