Mesa (master): intel/tools: Make swizzle an integer
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Fri Jul 31 20:40:48 UTC 2020
Module: Mesa
Branch: master
Commit: e115c499da276e7cf397a40ae6b71adffae049c8
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e115c499da276e7cf397a40ae6b71adffae049c8
Author: Matt Turner <mattst88 at gmail.com>
Date: Wed Jul 15 16:13:27 2020 -0700
intel/tools: Make swizzle an integer
Reviewed-by: Sagar Ghuge <sagar.ghuge at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
---
src/intel/tools/i965_gram.y | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/src/intel/tools/i965_gram.y b/src/intel/tools/i965_gram.y
index a98451f1549..89b36011353 100644
--- a/src/intel/tools/i965_gram.y
+++ b/src/intel/tools/i965_gram.y
@@ -481,7 +481,8 @@ i965_asm_set_dst_nr(struct brw_codegen *p,
%type <reg> srcarcoperandex srcaccimm srcarcoperandex_typed srcimm
%type <reg> indirectgenreg indirectregion
%type <reg> immreg src reg32 payload directgenreg_list addrparam region
-%type <reg> region_wh swizzle directgenreg directmsgreg indirectmsgreg
+%type <reg> region_wh directgenreg directmsgreg indirectmsgreg
+%type <integer> swizzle
/* registers */
%type <reg> accreg addrreg channelenablereg controlreg flagreg ipreg
@@ -1658,7 +1659,7 @@ indirectsrcoperand:
$4.vstride,
$4.width,
$4.hstride,
- $5.swizzle,
+ $5,
WRITEMASK_X);
$$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER;
@@ -1687,7 +1688,7 @@ directsrcoperand:
$4.vstride,
$4.width,
$4.hstride,
- $5.swizzle,
+ $5,
WRITEMASK_X);
}
| srcarcoperandex
@@ -2072,15 +2073,15 @@ writemask_w:
swizzle:
%empty
{
- $$.swizzle = BRW_SWIZZLE_NOOP;
+ $$ = BRW_SWIZZLE_NOOP;
}
| DOT chansel
{
- $$.swizzle = BRW_SWIZZLE4($2, $2, $2, $2);
+ $$ = BRW_SWIZZLE4($2, $2, $2, $2);
}
| DOT chansel chansel chansel chansel
{
- $$.swizzle = BRW_SWIZZLE4($2, $3, $4, $5);
+ $$ = BRW_SWIZZLE4($2, $3, $4, $5);
}
;
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