Mesa (master): pan/mdg: Ensure ld_vary_16 is aligned

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Module: Mesa
Branch: master
Commit: 2d1688345a622add9fef1dd5d6d87bee614d5666
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2d1688345a622add9fef1dd5d6d87bee614d5666

Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date:   Thu Jun  4 11:32:59 2020 -0400

pan/mdg: Ensure ld_vary_16 is aligned

Otherwise packing may fail.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Fixes: 5f8dd413bcc ("pan/mdg: Handle 16-bit ld_vary")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5339>

---

 src/panfrost/midgard/midgard_compile.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/src/panfrost/midgard/midgard_compile.c b/src/panfrost/midgard/midgard_compile.c
index 98f948a9b88..4cce9102c68 100644
--- a/src/panfrost/midgard/midgard_compile.c
+++ b/src/panfrost/midgard/midgard_compile.c
@@ -1273,6 +1273,12 @@ emit_varying_read(
 
         midgard_instruction ins = m_ld_vary_32(dest, offset);
         ins.mask = mask_of(nr_comp);
+        ins.dest_type = type;
+
+        if (type == nir_type_float16) {
+                /* Ensure we are aligned so we can pack it later */
+                ins.mask = mask_of(ALIGN_POT(nr_comp, 2));
+        }
 
         for (unsigned i = 0; i < ARRAY_SIZE(ins.swizzle[0]); ++i)
                 ins.swizzle[0][i] = MIN2(i + component, COMPONENT_W);