Mesa (master): aco: use v_bfe_u32 for unsigned reductions sign-extension on GFX6-GFX7

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Module: Mesa
Branch: master
Commit: ee4bc13de2aacb7bab24a3e55e44e7e50434df94
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ee4bc13de2aacb7bab24a3e55e44e7e50434df94

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Fri Jun  5 08:54:52 2020 +0200

aco: use v_bfe_u32 for unsigned reductions sign-extension on GFX6-GFX7

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Daniel Schürmann <daniel at schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5327>

---

 src/amd/compiler/aco_lower_to_hw_instr.cpp | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/src/amd/compiler/aco_lower_to_hw_instr.cpp b/src/amd/compiler/aco_lower_to_hw_instr.cpp
index 40d466904ef..a278b66ce82 100644
--- a/src/amd/compiler/aco_lower_to_hw_instr.cpp
+++ b/src/amd/compiler/aco_lower_to_hw_instr.cpp
@@ -591,7 +591,14 @@ void emit_reduction(lower_context *ctx, aco_opcode op, ReduceOp reduce_op, unsig
          sdwa->dst_sel = sdwa_udword;
          bld.insert(std::move(sdwa));
       } else if (ctx->program->chip_class == GFX6 || ctx->program->chip_class == GFX7) {
-         bld.vop3(aco_opcode::v_bfe_i32, Definition(PhysReg{tmp}, v1),
+         aco_opcode opcode;
+
+         if (reduce_op == imin16 || reduce_op == imax16 || reduce_op == iadd16)
+            opcode = aco_opcode::v_bfe_i32;
+         else
+            opcode = aco_opcode::v_bfe_u32;
+
+         bld.vop3(opcode, Definition(PhysReg{tmp}, v1),
                   Operand(PhysReg{tmp}, v1), Operand(0u), Operand(16u));
       }
    }