Mesa (master): radeonsi: add support for Sienna Cichlid

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 9538b9a68ed9aa0f8a231d6bf681f6f0a2a9d341
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9538b9a68ed9aa0f8a231d6bf681f6f0a2a9d341

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Thu Mar 26 22:08:18 2020 -0400

radeonsi: add support for Sienna Cichlid

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383>

---

 src/amd/addrlib/src/amdgpu_asic_addr.h        | 2 ++
 src/amd/addrlib/src/gfx10/gfx10addrlib.cpp    | 6 ++++++
 src/amd/common/ac_gpu_info.c                  | 6 +++++-
 src/amd/common/amd_family.h                   | 1 +
 src/amd/llvm/ac_llvm_util.c                   | 2 ++
 src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c | 4 +++-
 6 files changed, 19 insertions(+), 2 deletions(-)

diff --git a/src/amd/addrlib/src/amdgpu_asic_addr.h b/src/amd/addrlib/src/amdgpu_asic_addr.h
index 6b598a39df8..3307f1941a6 100644
--- a/src/amd/addrlib/src/amdgpu_asic_addr.h
+++ b/src/amd/addrlib/src/amdgpu_asic_addr.h
@@ -97,6 +97,7 @@
 #define AMDGPU_NAVI10_RANGE     0x01, 0x0A
 #define AMDGPU_NAVI12_RANGE     0x0A, 0x14
 #define AMDGPU_NAVI14_RANGE     0x14, 0x28
+#define AMDGPU_SIENNA_RANGE     0x28, 0x32
 
 #define AMDGPU_EXPAND_FIX(x) x
 #define AMDGPU_RANGE_HELPER(val, min, max) ((val >= min) && (val < max))
@@ -144,5 +145,6 @@
 #define ASICREV_IS_NAVI10_P(r)         ASICREV_IS(r, NAVI10)
 #define ASICREV_IS_NAVI12(r)           ASICREV_IS(r, NAVI12)
 #define ASICREV_IS_NAVI14(r)           ASICREV_IS(r, NAVI14)
+#define ASICREV_IS_SIENNA_M(r)         ASICREV_IS(r, SIENNA)
 
 #endif // _AMDGPU_ASIC_ADDR_H
diff --git a/src/amd/addrlib/src/gfx10/gfx10addrlib.cpp b/src/amd/addrlib/src/gfx10/gfx10addrlib.cpp
index eea3deefff8..49f31550c19 100644
--- a/src/amd/addrlib/src/gfx10/gfx10addrlib.cpp
+++ b/src/amd/addrlib/src/gfx10/gfx10addrlib.cpp
@@ -943,6 +943,12 @@ ChipFamily Gfx10Lib::HwlConvertChipFamily(
     {
         case FAMILY_NV:
             m_settings.isDcn2 = 1;
+
+            if (ASICREV_IS_SIENNA_M(chipRevision))
+            {
+                m_settings.supportRbPlus   = 1;
+                m_settings.dccUnsup3DSwDis = 0;
+            }
             break;
         default:
             ADDR_ASSERT(!"Unknown chip family");
diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index 517de226bd9..dbf5c930f46 100644
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -401,6 +401,7 @@ bool ac_query_gpu_info(int fd, void *dev_p,
 		identify_chip(NAVI10);
 		identify_chip(NAVI12);
 		identify_chip(NAVI14);
+		identify_chip(SIENNA);
 		break;
 	}
 
@@ -410,7 +411,9 @@ bool ac_query_gpu_info(int fd, void *dev_p,
 		return false;
 	}
 
-	if (info->family >= CHIP_NAVI10)
+	if (info->family >= CHIP_SIENNA)
+		info->chip_class = GFX10_3;
+	else if (info->family >= CHIP_NAVI10)
 		info->chip_class = GFX10;
 	else if (info->family >= CHIP_VEGA10)
 		info->chip_class = GFX9;
@@ -712,6 +715,7 @@ bool ac_query_gpu_info(int fd, void *dev_p,
 		case CHIP_RENOIR:
 		case CHIP_NAVI10:
 		case CHIP_NAVI12:
+		case CHIP_SIENNA:
 			pc_lines = 1024;
 			break;
 		case CHIP_NAVI14:
diff --git a/src/amd/common/amd_family.h b/src/amd/common/amd_family.h
index 8262a3a40b7..f546c4f96e9 100644
--- a/src/amd/common/amd_family.h
+++ b/src/amd/common/amd_family.h
@@ -102,6 +102,7 @@ enum radeon_family {
     CHIP_NAVI10,
     CHIP_NAVI12,
     CHIP_NAVI14,
+    CHIP_SIENNA,
     CHIP_LAST,
 };
 
diff --git a/src/amd/llvm/ac_llvm_util.c b/src/amd/llvm/ac_llvm_util.c
index 5dc4c934ba0..10a931b150f 100644
--- a/src/amd/llvm/ac_llvm_util.c
+++ b/src/amd/llvm/ac_llvm_util.c
@@ -157,6 +157,8 @@ const char *ac_get_llvm_processor_name(enum radeon_family family)
 		return "gfx1011";
 	case CHIP_NAVI14:
 		return "gfx1012";
+	case CHIP_SIENNA:
+		return "gfx1030";
 	default:
 		return "";
 	}
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
index 78816d80d1c..2ef7eaa7642 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
@@ -63,7 +63,9 @@ static void handle_env_var_force_family(struct amdgpu_winsys *ws)
             ws->info.family = i;
             ws->info.name = "GCN-NOOP";
 
-            if (i >= CHIP_NAVI10)
+            if (i >= CHIP_SIENNA)
+               ws->info.chip_class = GFX10_3;
+            else if (i >= CHIP_NAVI10)
                ws->info.chip_class = GFX10;
             else if (i >= CHIP_VEGA10)
                ws->info.chip_class = GFX9;