Mesa (master): radv/aco: enable shaderInt16 on GFX6-GFX7

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Module: Mesa
Branch: master
Commit: be4dd6abd13408c5cd320fd3d2547b04e1c0cba5
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=be4dd6abd13408c5cd320fd3d2547b04e1c0cba5

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Thu May  7 10:54:12 2020 +0200

radv/aco: enable shaderInt16 on GFX6-GFX7

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Daniel Schürmann <daniel at schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02 at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5226>

---

 src/amd/vulkan/radv_device.c | 2 +-
 src/amd/vulkan/radv_shader.c | 8 ++++----
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 62e37a6e2aa..5db1456a4da 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -942,7 +942,7 @@ void radv_GetPhysicalDeviceFeatures(
 		.shaderCullDistance                       = true,
 		.shaderFloat64                            = true,
 		.shaderInt64                              = true,
-		.shaderInt16                              = !pdevice->use_aco || pdevice->rad_info.chip_class >= GFX8,
+		.shaderInt16                              = true,
 		.sparseBinding                            = true,
 		.variableMultisampleRate                  = true,
 		.shaderResourceMinLod                     = true,
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 55ff73799ef..2ae60fe7d5e 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -351,8 +351,8 @@ radv_shader_compile_to_nir(struct radv_device *device,
 				}
 			}
 		}
-		bool int8_int16_enable = !device->physical_device->use_aco ||
-					 device->physical_device->rad_info.chip_class >= GFX8;
+		bool int8_enable = !device->physical_device->use_aco ||
+				   device->physical_device->rad_info.chip_class >= GFX8;
 		const struct spirv_to_nir_options spirv_options = {
 			.lower_ubo_ssbo_access_to_offsets = true,
 			.caps = {
@@ -377,8 +377,8 @@ radv_shader_compile_to_nir(struct radv_device *device,
 				.image_ms_array = true,
 				.image_read_without_format = true,
 				.image_write_without_format = true,
-				.int8 = int8_int16_enable,
-				.int16 = int8_int16_enable,
+				.int8 = int8_enable,
+				.int16 = true,
 				.int64 = true,
 				.int64_atomics = true,
 				.min_lod = true,