Mesa (staging/20.1): radv: set DB_SHADER_CONTROL.CONSERVATIVE_Z_EXPORT correctly

[GitLab Mirror]

Module: Mesa
Branch: staging/20.1
Commit: edce822c64b0c6592ea47cc0d22c28131458cb29
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=edce822c64b0c6592ea47cc0d22c28131458cb29

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Tue Jun  9 17:59:00 2020 +0200

radv: set DB_SHADER_CONTROL.CONSERVATIVE_Z_EXPORT correctly

Use the SPIR-V execution modes if set.

Cc: 20.1 <mesa-stable at lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5404>
(cherry picked from commit 07aefe8065ddcc6c4c5815c761ede265bd760d78)

---

 .pick_status.json                 | 2 +-
 src/amd/vulkan/radv_pipeline.c    | 7 +++++++
 src/amd/vulkan/radv_shader.h      | 1 +
 src/amd/vulkan/radv_shader_info.c | 1 +
 4 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/.pick_status.json b/.pick_status.json
index bdb8db84db4..b93dfce6ff9 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -805,7 +805,7 @@
         "description": "radv: set DB_SHADER_CONTROL.CONSERVATIVE_Z_EXPORT correctly",
         "nominated": true,
         "nomination_type": 0,
-        "resolution": 0,
+        "resolution": 1,
         "master_sha": null,
         "because_sha": null
     },
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 33b93e7d0c9..686200bd89d 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -4482,12 +4482,18 @@ radv_compute_db_shader_control(const struct radv_device *device,
 			       const struct radv_pipeline *pipeline,
                                const struct radv_shader_variant *ps)
 {
+	unsigned conservative_z_export = V_02880C_EXPORT_ANY_Z;
 	unsigned z_order;
 	if (ps->info.ps.early_fragment_test || !ps->info.ps.writes_memory)
 		z_order = V_02880C_EARLY_Z_THEN_LATE_Z;
 	else
 		z_order = V_02880C_LATE_Z;
 
+	if (ps->info.ps.depth_layout == FRAG_DEPTH_LAYOUT_GREATER)
+		conservative_z_export = V_02880C_EXPORT_GREATER_THAN_Z;
+	else if (ps->info.ps.depth_layout == FRAG_DEPTH_LAYOUT_LESS)
+		conservative_z_export = V_02880C_EXPORT_LESS_THAN_Z;
+
 	bool disable_rbplus = device->physical_device->rad_info.has_rbplus &&
 	                      !device->physical_device->rad_info.rbplus_allowed;
 
@@ -4501,6 +4507,7 @@ radv_compute_db_shader_control(const struct radv_device *device,
 		S_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE(ps->info.ps.writes_stencil) |
 		S_02880C_KILL_ENABLE(!!ps->info.ps.can_discard) |
 		S_02880C_MASK_EXPORT_ENABLE(mask_export_enable) |
+		S_02880C_CONSERVATIVE_Z_EXPORT(conservative_z_export) |
 		S_02880C_Z_ORDER(z_order) |
 		S_02880C_DEPTH_BEFORE_SHADER(ps->info.ps.early_fragment_test) |
 		S_02880C_PRE_SHADER_DEPTH_COVERAGE_ENABLE(ps->info.ps.post_depth_coverage) |
diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h
index d7c8119cd24..5b4a61ab336 100644
--- a/src/amd/vulkan/radv_shader.h
+++ b/src/amd/vulkan/radv_shader.h
@@ -310,6 +310,7 @@ struct radv_shader_info {
 		bool can_discard;
 		bool early_fragment_test;
 		bool post_depth_coverage;
+		uint8_t depth_layout;
 	} ps;
 	struct {
 		bool uses_grid_size;
diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c
index c651f216280..c7e26ba176f 100644
--- a/src/amd/vulkan/radv_shader_info.c
+++ b/src/amd/vulkan/radv_shader_info.c
@@ -763,6 +763,7 @@ radv_nir_shader_info_pass(const struct nir_shader *nir,
 		info->ps.can_discard = nir->info.fs.uses_discard;
                 info->ps.early_fragment_test = nir->info.fs.early_fragment_tests;
                 info->ps.post_depth_coverage = nir->info.fs.post_depth_coverage;
+                info->ps.depth_layout = nir->info.fs.depth_layout;
                 break;
         case MESA_SHADER_GEOMETRY:
                 info->gs.vertices_in = nir->info.gs.vertices_in;