Mesa (master): freedreno/ir3: move ubo_state into const_state
GitLab Mirror
gitlab-mirror at kemper.freedesktop.org
Fri Jun 19 13:49:31 UTC 2020
Module: Mesa
Branch: master
Commit: 70fbd48b3a87f2e0e1a6d597d0e992b3b96340e5
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=70fbd48b3a87f2e0e1a6d597d0e992b3b96340e5
Author: Rob Clark <robdclark at chromium.org>
Date: Sun Jun 14 12:44:17 2020 -0700
freedreno/ir3: move ubo_state into const_state
As with const_state, this will also need to move into the variant. To
simplify that, just move it into the const_state itself, since after all
it is related.
Signed-off-by: Rob Clark <robdclark at chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>
---
src/freedreno/ir3/ir3_compiler_nir.c | 2 +-
src/freedreno/ir3/ir3_nir.c | 4 +--
src/freedreno/ir3/ir3_nir_analyze_ubo_ranges.c | 2 +-
src/freedreno/ir3/ir3_shader.h | 37 +++++++++++++-------------
src/freedreno/vulkan/tu_cmd_buffer.c | 2 +-
src/freedreno/vulkan/tu_pipeline.c | 1 -
src/freedreno/vulkan/tu_private.h | 1 -
src/gallium/drivers/freedreno/a6xx/fd6_const.c | 2 +-
src/gallium/drivers/freedreno/ir3/ir3_const.h | 4 +--
9 files changed, 27 insertions(+), 28 deletions(-)
diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c
index 88de1122ef8..bb45ba2c049 100644
--- a/src/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/freedreno/ir3/ir3_compiler_nir.c
@@ -1461,7 +1461,7 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
* addr reg value can be:
*/
ctx->so->constlen = MAX2(ctx->so->constlen,
- ctx->so->shader->ubo_state.size / 16);
+ const_state->ubo_state.size / 16);
}
break;
diff --git a/src/freedreno/ir3/ir3_nir.c b/src/freedreno/ir3/ir3_nir.c
index 364ebf3057a..e1c163ddc5c 100644
--- a/src/freedreno/ir3/ir3_nir.c
+++ b/src/freedreno/ir3/ir3_nir.c
@@ -479,8 +479,8 @@ ir3_setup_const_state(struct ir3_shader *shader, nir_shader *nir,
/* num_driver_params is scalar, align to vec4: */
const_state->num_driver_params = align(const_state->num_driver_params, 4);
- debug_assert((shader->ubo_state.size % 16) == 0);
- unsigned constoff = shader->ubo_state.size / 16;
+ debug_assert((const_state->ubo_state.size % 16) == 0);
+ unsigned constoff = const_state->ubo_state.size / 16;
unsigned ptrsz = ir3_pointer_size(compiler);
if (const_state->num_ubos > 0) {
diff --git a/src/freedreno/ir3/ir3_nir_analyze_ubo_ranges.c b/src/freedreno/ir3/ir3_nir_analyze_ubo_ranges.c
index 449d908a290..26f9aadaa5b 100644
--- a/src/freedreno/ir3/ir3_nir_analyze_ubo_ranges.c
+++ b/src/freedreno/ir3/ir3_nir_analyze_ubo_ranges.c
@@ -304,7 +304,7 @@ instr_is_load_ubo(nir_instr *instr)
bool
ir3_nir_analyze_ubo_ranges(nir_shader *nir, struct ir3_shader *shader)
{
- struct ir3_ubo_analysis_state *state = &shader->ubo_state;
+ struct ir3_ubo_analysis_state *state = &shader->const_state.ubo_state;
memset(state, 0, sizeof(*state));
for (int i = 0; i < IR3_MAX_UBO_PUSH_RANGES; i++) {
diff --git a/src/freedreno/ir3/ir3_shader.h b/src/freedreno/ir3/ir3_shader.h
index f646f334690..a89abfe9e16 100644
--- a/src/freedreno/ir3/ir3_shader.h
+++ b/src/freedreno/ir3/ir3_shader.h
@@ -73,6 +73,22 @@ enum ir3_driver_param {
#define IR3_MAX_UBO_PUSH_RANGES 32
+struct ir3_ubo_range {
+ uint32_t offset; /* start offset to push in the const register file */
+ uint32_t block; /* Which constant block */
+ uint32_t start, end; /* range of block that's actually used */
+ uint16_t bindless_base; /* For bindless, which base register is used */
+ bool bindless;
+};
+
+struct ir3_ubo_analysis_state {
+ struct ir3_ubo_range range[IR3_MAX_UBO_PUSH_RANGES];
+ uint32_t num_enabled;
+ uint32_t size;
+ uint32_t lower_count;
+ uint32_t cmdstream_size; /* for per-gen backend to stash required cmdstream size */
+};
+
/**
* Describes the layout of shader consts. This includes:
* + User consts + driver lowered UBO ranges
@@ -157,6 +173,9 @@ struct ir3_const_state {
struct {
uint32_t val[4];
} *immediates;
+
+ /* State of ubo access lowered to push consts: */
+ struct ir3_ubo_analysis_state ubo_state;
};
/**
@@ -588,22 +607,6 @@ ir3_shader_stage(struct ir3_shader_variant *v)
}
}
-struct ir3_ubo_range {
- uint32_t offset; /* start offset to push in the const register file */
- uint32_t block; /* Which constant block */
- uint32_t start, end; /* range of block that's actually used */
- uint16_t bindless_base; /* For bindless, which base register is used */
- bool bindless;
-};
-
-struct ir3_ubo_analysis_state {
- struct ir3_ubo_range range[IR3_MAX_UBO_PUSH_RANGES];
- uint32_t num_enabled;
- uint32_t size;
- uint32_t lower_count;
- uint32_t cmdstream_size; /* for per-gen backend to stash required cmdstream size */
-};
-
struct ir3_shader {
gl_shader_stage type;
@@ -619,8 +622,6 @@ struct ir3_shader {
struct ir3_compiler *compiler;
- struct ir3_ubo_analysis_state ubo_state;
-
/* Number of UBOs loaded by LDC, as opposed to LDG through pointers in
* ubo_state.
*/
diff --git a/src/freedreno/vulkan/tu_cmd_buffer.c b/src/freedreno/vulkan/tu_cmd_buffer.c
index 9a83632a196..6b196e70868 100644
--- a/src/freedreno/vulkan/tu_cmd_buffer.c
+++ b/src/freedreno/vulkan/tu_cmd_buffer.c
@@ -2912,7 +2912,7 @@ tu6_emit_user_consts(struct tu_cs *cs, const struct tu_pipeline *pipeline,
{
const struct tu_program_descriptor_linkage *link =
&pipeline->program.link[type];
- const struct ir3_ubo_analysis_state *state = &link->ubo_state;
+ const struct ir3_ubo_analysis_state *state = &link->const_state.ubo_state;
if (link->push_consts.count > 0) {
unsigned num_units = link->push_consts.count;
diff --git a/src/freedreno/vulkan/tu_pipeline.c b/src/freedreno/vulkan/tu_pipeline.c
index 1bd40f0ccc9..9c7cc4e08af 100644
--- a/src/freedreno/vulkan/tu_pipeline.c
+++ b/src/freedreno/vulkan/tu_pipeline.c
@@ -1807,7 +1807,6 @@ tu_pipeline_set_linkage(struct tu_program_descriptor_linkage *link,
struct tu_shader *shader,
struct ir3_shader_variant *v)
{
- link->ubo_state = v->shader->ubo_state;
link->const_state = *ir3_const_state(v);
link->constlen = v->constlen;
link->push_consts = shader->push_consts;
diff --git a/src/freedreno/vulkan/tu_private.h b/src/freedreno/vulkan/tu_private.h
index 4fd2120c366..39f303ee7d7 100644
--- a/src/freedreno/vulkan/tu_private.h
+++ b/src/freedreno/vulkan/tu_private.h
@@ -1045,7 +1045,6 @@ tu_shader_destroy(struct tu_device *dev,
struct tu_program_descriptor_linkage
{
- struct ir3_ubo_analysis_state ubo_state;
struct ir3_const_state const_state;
uint32_t constlen;
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_const.c b/src/gallium/drivers/freedreno/a6xx/fd6_const.c
index ad67378a27c..5b591441839 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_const.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_const.c
@@ -280,7 +280,7 @@ fd6_emit_ubos(struct fd_context *ctx, const struct ir3_shader_variant *v,
static unsigned
user_consts_cmdstream_size(struct ir3_shader_variant *v)
{
- struct ir3_ubo_analysis_state *ubo_state = &v->shader->ubo_state;
+ struct ir3_ubo_analysis_state *ubo_state = &ir3_const_state(v)->ubo_state;
if (unlikely(!ubo_state->cmdstream_size)) {
unsigned packets, size;
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_const.h b/src/gallium/drivers/freedreno/ir3/ir3_const.h
index 92923d28863..2b92ac920b7 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_const.h
+++ b/src/gallium/drivers/freedreno/ir3/ir3_const.h
@@ -93,8 +93,8 @@ static inline void
ir3_emit_user_consts(struct fd_screen *screen, const struct ir3_shader_variant *v,
struct fd_ringbuffer *ring, struct fd_constbuf_stateobj *constbuf)
{
- struct ir3_ubo_analysis_state *state;
- state = &v->shader->ubo_state;
+ const struct ir3_const_state *const_state = ir3_const_state(v);
+ const struct ir3_ubo_analysis_state *state = &const_state->ubo_state;
for (unsigned i = 0; i < state->num_enabled; i++) {
assert(!state->range[i].bindless);
More information about the mesa-commit
mailing list