Mesa (master): freedreno/ir3: drop shader->num_ubos
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Fri Jun 19 13:49:31 UTC 2020
Module: Mesa
Branch: master
Commit: 91ed8b7fe370d7293fcdc511cfd65c7c97ed516d
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=91ed8b7fe370d7293fcdc511cfd65c7c97ed516d
Author: Rob Clark <robdclark at chromium.org>
Date: Sun Jun 14 12:54:05 2020 -0700
freedreno/ir3: drop shader->num_ubos
The only difference between this and `const_state->num_ubos` was that
the latter is counting # of ubos loaded via `ldg` (based on UBO addrs
in push-consts). But turns out there isn't really any reason to care.
Instead just add an early return in the one code-path that cares about
the number of `ldg` UBOs.
This gets rid of one more thing we need to move from `ir3_shader` to
`ir3_shader_variant`.
Signed-off-by: Rob Clark <robdclark at chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>
---
src/freedreno/ir3/ir3_nir.c | 8 +-------
src/freedreno/ir3/ir3_shader.h | 5 -----
src/gallium/drivers/freedreno/a6xx/fd6_const.c | 12 +++++++-----
src/gallium/drivers/freedreno/ir3/ir3_const.h | 7 +++++++
4 files changed, 15 insertions(+), 17 deletions(-)
diff --git a/src/freedreno/ir3/ir3_nir.c b/src/freedreno/ir3/ir3_nir.c
index e1c163ddc5c..0afe624a355 100644
--- a/src/freedreno/ir3/ir3_nir.c
+++ b/src/freedreno/ir3/ir3_nir.c
@@ -468,13 +468,7 @@ ir3_setup_const_state(struct ir3_shader *shader, nir_shader *nir,
MAX2(const_state->num_driver_params, IR3_DP_VTXCNT_MAX + 1);
}
- /* On a6xx, we use UBO descriptors and LDC instead of UBO pointers in the
- * constbuf.
- */
- if (compiler->gpu_id >= 600)
- shader->num_ubos = nir->info.num_ubos;
- else
- const_state->num_ubos = nir->info.num_ubos;
+ const_state->num_ubos = nir->info.num_ubos;
/* num_driver_params is scalar, align to vec4: */
const_state->num_driver_params = align(const_state->num_driver_params, 4);
diff --git a/src/freedreno/ir3/ir3_shader.h b/src/freedreno/ir3/ir3_shader.h
index a89abfe9e16..1ee7371d8f4 100644
--- a/src/freedreno/ir3/ir3_shader.h
+++ b/src/freedreno/ir3/ir3_shader.h
@@ -622,11 +622,6 @@ struct ir3_shader {
struct ir3_compiler *compiler;
- /* Number of UBOs loaded by LDC, as opposed to LDG through pointers in
- * ubo_state.
- */
- unsigned num_ubos;
-
struct ir3_const_state const_state;
struct nir_shader *nir;
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_const.c b/src/gallium/drivers/freedreno/a6xx/fd6_const.c
index 5b591441839..2e9af8c03ae 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_const.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_const.c
@@ -233,10 +233,11 @@ static void
fd6_emit_ubos(struct fd_context *ctx, const struct ir3_shader_variant *v,
struct fd_ringbuffer *ring, struct fd_constbuf_stateobj *constbuf)
{
- if (!v->shader->num_ubos)
- return;
+ const struct ir3_const_state *const_state = ir3_const_state(v);
+ int num_ubos = const_state->num_ubos;
- int num_ubos = v->shader->num_ubos;
+ if (!num_ubos)
+ return;
OUT_PKT7(ring, fd6_stage2opcode(v->type), 3 + (2 * num_ubos));
OUT_RING(ring, CP_LOAD_STATE6_0_DST_OFF(0) |
@@ -280,7 +281,8 @@ fd6_emit_ubos(struct fd_context *ctx, const struct ir3_shader_variant *v,
static unsigned
user_consts_cmdstream_size(struct ir3_shader_variant *v)
{
- struct ir3_ubo_analysis_state *ubo_state = &ir3_const_state(v)->ubo_state;
+ struct ir3_const_state *const_state = ir3_const_state(v);
+ struct ir3_ubo_analysis_state *ubo_state = &const_state->ubo_state;
if (unlikely(!ubo_state->cmdstream_size)) {
unsigned packets, size;
@@ -290,7 +292,7 @@ user_consts_cmdstream_size(struct ir3_shader_variant *v)
/* also account for UBO addresses: */
packets += 1;
- size += 2 * v->shader->num_ubos;
+ size += 2 * const_state->num_ubos;
unsigned sizedwords = (4 * packets) + size;
ubo_state->cmdstream_size = sizedwords * 4;
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_const.h b/src/gallium/drivers/freedreno/ir3/ir3_const.h
index 2b92ac920b7..ee73bc501d9 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_const.h
+++ b/src/gallium/drivers/freedreno/ir3/ir3_const.h
@@ -136,6 +136,13 @@ ir3_emit_ubos(struct fd_context *ctx, const struct ir3_shader_variant *v,
{
const struct ir3_const_state *const_state = ir3_const_state(v);
uint32_t offset = const_state->offsets.ubo;
+
+ /* a6xx+ uses UBO state and ldc instead of pointers emitted in
+ * const state and ldg:
+ */
+ if (ctx->screen->gpu_id >= 600)
+ return;
+
if (v->constlen > offset) {
uint32_t params = const_state->num_ubos;
uint32_t offsets[params];
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