Mesa (master): intel/compiler: Always apply sample mask on Vulkan.

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Module: Mesa
Branch: master
Commit: 04f77595f0bb5adc31e9e0ff2114c1ed5b60371d
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=04f77595f0bb5adc31e9e0ff2114c1ed5b60371d

Author: Arcady Goldmints-Orlov <agoldmints at igalia.com>
Date:   Thu May  7 19:34:56 2020 -0500

intel/compiler: Always apply sample mask on Vulkan.

With OpenGL, shader writes to the sample mask are ignored when not
rendering to a multisample render target. However, on Vulkan, writes to
the sample mask have still have their effect in that case.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3016

Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5156>

---

 src/gallium/drivers/iris/iris_program.c | 1 +
 src/intel/compiler/brw_compiler.h       | 1 +
 src/intel/compiler/brw_fs.cpp           | 4 ++--
 src/intel/vulkan/anv_pipeline.c         | 2 ++
 src/mesa/drivers/dri/i965/brw_wm.c      | 2 ++
 5 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/iris/iris_program.c b/src/gallium/drivers/iris/iris_program.c
index 4790ef34576..91336dfa2fd 100644
--- a/src/gallium/drivers/iris/iris_program.c
+++ b/src/gallium/drivers/iris/iris_program.c
@@ -125,6 +125,7 @@ iris_to_brw_fs_key(const struct gen_device_info *devinfo,
       .coherent_fb_fetch = key->coherent_fb_fetch,
       .color_outputs_valid = key->color_outputs_valid,
       .input_slots_valid = key->input_slots_valid,
+      .ignore_sample_mask_out = !key->multisample_fbo,
    };
 }
 
diff --git a/src/intel/compiler/brw_compiler.h b/src/intel/compiler/brw_compiler.h
index 963d8fa2fc8..d5ec740225e 100644
--- a/src/intel/compiler/brw_compiler.h
+++ b/src/intel/compiler/brw_compiler.h
@@ -457,6 +457,7 @@ struct brw_wm_prog_key {
    bool high_quality_derivatives:1;
    bool force_dual_color_blend:1;
    bool coherent_fb_fetch:1;
+   bool ignore_sample_mask_out:1;
 
    uint8_t color_outputs_valid;
    uint64_t input_slots_valid;
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index a41d15270b9..d3dc1f45110 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -8565,8 +8565,8 @@ brw_compile_fs(const struct brw_compiler *compiler, void *log_data,
     */
    prog_data->uses_kill = shader->info.fs.uses_discard ||
       key->alpha_test_func;
-   prog_data->uses_omask = key->multisample_fbo &&
-      shader->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK);
+   prog_data->uses_omask = !key->ignore_sample_mask_out &&
+      (shader->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK));
    prog_data->computed_depth_mode = computed_depth_mode(shader);
    prog_data->computed_stencil =
       shader->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL);
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 9ddb2ebabeb..856c018d10e 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -516,6 +516,8 @@ populate_wm_prog_key(const struct gen_device_info *devinfo,
    /* XXX Vulkan doesn't appear to specify */
    key->clamp_fragment_color = false;
 
+   key->ignore_sample_mask_out = false;
+
    assert(subpass->color_count <= MAX_RTS);
    for (uint32_t i = 0; i < subpass->color_count; i++) {
       if (subpass->color_attachments[i].attachment != VK_ATTACHMENT_UNUSED)
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index 256115103dd..24a23c1bc8e 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -490,6 +490,8 @@ brw_wm_populate_key(struct brw_context *brw, struct brw_wm_prog_key *key)
       key->multisample_fbo = _mesa_geometric_samples(ctx->DrawBuffer) > 1;
    }
 
+   key->ignore_sample_mask_out = !key->multisample_fbo;
+
    /* BRW_NEW_VUE_MAP_GEOM_OUT */
    if (devinfo->gen < 6 || util_bitcount64(prog->info.inputs_read &
                                              BRW_FS_VARYING_INPUT_MASK) > 16) {