Mesa (master): iris/l3: Enable L3 full way allocation when L3 config is NULL
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Mon Jun 22 21:04:12 UTC 2020
Module: Mesa
Branch: master
Commit: e2e0521ecbbc0e666582162c2bf149f1e41c73e2
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e2e0521ecbbc0e666582162c2bf149f1e41c73e2
Author: Jordan Justen <jordan.l.justen at intel.com>
Date: Fri Aug 2 00:32:17 2019 -0700
iris/l3: Enable L3 full way allocation when L3 config is NULL
Reworks:
* Jordan: Check for cfg == NULL rather than is_dg1
Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
---
src/gallium/drivers/iris/iris_state.c | 15 +++++++++++----
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c
index 4ef149f7060..e77f900a316 100644
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -744,6 +744,7 @@ iris_emit_l3_config(struct iris_batch *batch,
const struct gen_l3_config *cfg)
{
uint32_t reg_val;
+ assert(cfg || GEN_GEN >= 12);
#if GEN_GEN >= 12
#define L3_ALLOCATION_REG GENX(L3ALLOC)
@@ -765,10 +766,16 @@ iris_emit_l3_config(struct iris_batch *batch,
reg.ErrorDetectionBehaviorControl = true;
reg.UseFullWays = true;
#endif
- reg.URBAllocation = cfg->n[GEN_L3P_URB];
- reg.ROAllocation = cfg->n[GEN_L3P_RO];
- reg.DCAllocation = cfg->n[GEN_L3P_DC];
- reg.AllAllocation = cfg->n[GEN_L3P_ALL];
+ if (GEN_GEN < 12 || cfg) {
+ reg.URBAllocation = cfg->n[GEN_L3P_URB];
+ reg.ROAllocation = cfg->n[GEN_L3P_RO];
+ reg.DCAllocation = cfg->n[GEN_L3P_DC];
+ reg.AllAllocation = cfg->n[GEN_L3P_ALL];
+ } else {
+#if GEN_GEN >= 12
+ reg.L3FullWayAllocationEnable = true;
+#endif
+ }
}
_iris_emit_lri(batch, L3_ALLOCATION_REG_num, reg_val);
}
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