Mesa (master): intel/fs: Move more prog_data setup into populate_wm_prog_data
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Tue Jun 23 17:53:19 UTC 2020
Module: Mesa
Branch: master
Commit: 479797e130410b230cc5cd7642592c8e2c00af54
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=479797e130410b230cc5cd7642592c8e2c00af54
Author: Jason Ekstrand <jason at jlekstrand.net>
Date: Thu Oct 24 17:31:18 2019 -0500
intel/fs: Move more prog_data setup into populate_wm_prog_data
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg at google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5596>
---
src/intel/compiler/brw_fs.cpp | 38 ++++++++++++++++++++------------------
src/intel/compiler/brw_wm_iz.cpp | 2 --
2 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 70ffe28d408..bab816227c0 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -7220,24 +7220,6 @@ fs_visitor::setup_fs_payload_gen6()
assert(dispatch_width % payload_width == 0);
assert(devinfo->gen >= 6);
- prog_data->uses_src_depth = prog_data->uses_src_w =
- (nir->info.system_values_read & (1ull << SYSTEM_VALUE_FRAG_COORD)) != 0;
-
- prog_data->uses_sample_mask =
- (nir->info.system_values_read & SYSTEM_BIT_SAMPLE_MASK_IN) != 0;
-
- /* From the Ivy Bridge PRM documentation for 3DSTATE_PS:
- *
- * "MSDISPMODE_PERSAMPLE is required in order to select
- * POSOFFSET_SAMPLE"
- *
- * So we can only really get sample positions if we are doing real
- * per-sample dispatch. If we need gl_SamplePosition and we don't have
- * persample dispatch, we hard-code it to 0.5.
- */
- prog_data->uses_pos_offset = prog_data->persample_dispatch &&
- (nir->info.system_values_read & SYSTEM_BIT_SAMPLE_POS);
-
/* R0: PS thread payload header. */
payload.num_regs++;
@@ -8515,6 +8497,9 @@ brw_nir_populate_wm_prog_data(const nir_shader *shader,
const struct brw_wm_prog_key *key,
struct brw_wm_prog_data *prog_data)
{
+ prog_data->uses_src_depth = prog_data->uses_src_w =
+ shader->info.system_values_read & BITFIELD64_BIT(SYSTEM_VALUE_FRAG_COORD);
+
/* key->alpha_test_func means simulating alpha testing via discards,
* so the shader definitely kills pixels.
*/
@@ -8534,6 +8519,23 @@ brw_nir_populate_wm_prog_data(const nir_shader *shader,
shader->info.fs.uses_sample_qualifier ||
shader->info.outputs_read);
+ if (devinfo->gen >= 6) {
+ prog_data->uses_sample_mask =
+ shader->info.system_values_read & SYSTEM_BIT_SAMPLE_MASK_IN;
+
+ /* From the Ivy Bridge PRM documentation for 3DSTATE_PS:
+ *
+ * "MSDISPMODE_PERSAMPLE is required in order to select
+ * POSOFFSET_SAMPLE"
+ *
+ * So we can only really get sample positions if we are doing real
+ * per-sample dispatch. If we need gl_SamplePosition and we don't have
+ * persample dispatch, we hard-code it to 0.5.
+ */
+ prog_data->uses_pos_offset = prog_data->persample_dispatch &&
+ (shader->info.system_values_read & SYSTEM_BIT_SAMPLE_POS);
+ }
+
prog_data->has_render_target_reads = shader->info.outputs_read != 0ull;
prog_data->early_fragment_tests = shader->info.fs.early_fragment_tests;
diff --git a/src/intel/compiler/brw_wm_iz.cpp b/src/intel/compiler/brw_wm_iz.cpp
index c2ea4aafd2b..8b280d8f050 100644
--- a/src/intel/compiler/brw_wm_iz.cpp
+++ b/src/intel/compiler/brw_wm_iz.cpp
@@ -144,8 +144,6 @@ void fs_visitor::setup_fs_payload_gen4()
payload.subspan_coord_reg[0] = reg++;
- prog_data->uses_src_depth =
- (nir->info.system_values_read & (1ull << SYSTEM_VALUE_FRAG_COORD)) != 0;
if (wm_iz_table[lookup].sd_present || prog_data->uses_src_depth ||
kill_stats_promoted_workaround) {
payload.source_depth_reg[0] = reg;
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