Mesa (master): intel/eu: Set the right subnr for ALIGN16 destinations
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Tue Jun 23 17:53:20 UTC 2020
Module: Mesa
Branch: master
Commit: e0ab48e3ea0c1355b2da191bb3b0213f088d7582
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e0ab48e3ea0c1355b2da191bb3b0213f088d7582
Author: Jason Ekstrand <jason at jlekstrand.net>
Date: Thu Oct 17 09:54:02 2019 -0500
intel/eu: Set the right subnr for ALIGN16 destinations
Reviewed-by: Kristian H. Kristensen <hoegsberg at google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5596>
---
src/intel/compiler/brw_eu_emit.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c
index cc1bc8cc13f..bd59cf9ac47 100644
--- a/src/intel/compiler/brw_eu_emit.c
+++ b/src/intel/compiler/brw_eu_emit.c
@@ -890,7 +890,7 @@ brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest,
dest.file == BRW_MESSAGE_REGISTER_FILE);
}
brw_inst_set_3src_dst_reg_nr(devinfo, inst, dest.nr);
- brw_inst_set_3src_a16_dst_subreg_nr(devinfo, inst, dest.subnr / 16);
+ brw_inst_set_3src_a16_dst_subreg_nr(devinfo, inst, dest.subnr / 4);
brw_inst_set_3src_a16_dst_writemask(devinfo, inst, dest.writemask);
assert(src0.file == BRW_GENERAL_REGISTER_FILE);
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