Mesa (staging/20.1): ac/nir: fix 64-bit division for GL CTS

[GitLab Mirror]

Module: Mesa
Branch: staging/20.1
Commit: 7cebe2fa17f4cfe0d10aa90cd89209174842efb0
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7cebe2fa17f4cfe0d10aa90cd89209174842efb0

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Wed Jun 17 15:25:28 2020 -0400

ac/nir: fix 64-bit division for GL CTS

This fixes: KHR-GL45.gpu_shader_fp64.builtin.mod_*

Fixes: ba2ec1f3 "ac/nir: use llvm.amdgcn.rcp in ac_build_fdiv()"

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5531>
(cherry picked from commit 2b8b62c55bb26e887a86d42ef645daa0ed0007ee)

---

 .pick_status.json             |  2 +-
 src/amd/llvm/ac_llvm_build.c  |  5 +++++
 src/amd/llvm/ac_nir_to_llvm.c | 11 +++++++++--
 3 files changed, 15 insertions(+), 3 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index bb53ce05f40..880be180e33 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -292,7 +292,7 @@
         "description": "ac/nir: fix 64-bit division for GL CTS",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "master_sha": null,
         "because_sha": "ba2ec1f369d2c97fc7c54ecd52b0addcfd349a31"
     },
diff --git a/src/amd/llvm/ac_llvm_build.c b/src/amd/llvm/ac_llvm_build.c
index 12067cd5eae..edbedfb9a37 100644
--- a/src/amd/llvm/ac_llvm_build.c
+++ b/src/amd/llvm/ac_llvm_build.c
@@ -703,6 +703,11 @@ ac_build_fdiv(struct ac_llvm_context *ctx,
 	unsigned type_size = ac_get_type_size(LLVMTypeOf(den));
 	const char *name;
 
+	/* For doubles, we need precise division to pass GLCTS. */
+	if (ctx->float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL &&
+	    type_size == 8)
+		return LLVMBuildFDiv(ctx->builder, num, den, "");
+
 	if (type_size == 2)
 		name = "llvm.amdgcn.rcp.f16";
 	else if (type_size == 4)
diff --git a/src/amd/llvm/ac_nir_to_llvm.c b/src/amd/llvm/ac_nir_to_llvm.c
index f2cd2b3a9ea..0fcd5934af0 100644
--- a/src/amd/llvm/ac_nir_to_llvm.c
+++ b/src/amd/llvm/ac_nir_to_llvm.c
@@ -692,8 +692,15 @@ static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
 		result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
 		break;
 	case nir_op_frcp:
-		result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rcp",
-					      ac_to_float_type(&ctx->ac, def_type), src[0]);
+		/* For doubles, we need precise division to pass GLCTS. */
+		if (ctx->ac.float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL &&
+		    ac_get_type_size(def_type) == 8) {
+			result = LLVMBuildFDiv(ctx->ac.builder, ctx->ac.f64_1,
+					       ac_to_float(&ctx->ac, src[0]), "");
+		} else {
+			result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rcp",
+						      ac_to_float_type(&ctx->ac, def_type), src[0]);
+		}
 		break;
 	case nir_op_iand:
 		result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");