Mesa (master): pan/bi: Don't schedule <32-bit IMATH to FMA

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Module: Mesa
Branch: master
Commit: 1799435df0f2782671596dd34c1f1965931943ad
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1799435df0f2782671596dd34c1f1965931943ad

Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date:   Mon May  4 14:40:09 2020 -0400

pan/bi: Don't schedule <32-bit IMATH to FMA

The ops don't exist.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890>

---

 src/panfrost/bifrost/bi_schedule.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/src/panfrost/bifrost/bi_schedule.c b/src/panfrost/bifrost/bi_schedule.c
index d1d99d94233..ba8c0a93387 100644
--- a/src/panfrost/bifrost/bi_schedule.c
+++ b/src/panfrost/bifrost/bi_schedule.c
@@ -109,6 +109,14 @@ bi_icmp(bi_instruction *ins)
         return ic && (ins->type == BI_CMP);
 }
 
+/* No 8/16-bit IADD/ISUB on FMA */
+static bool
+bi_imath_small(bi_instruction *ins)
+{
+        bool sz = nir_alu_type_get_type_size(ins->src_types[0]) < 32;
+        return sz && (ins->type == BI_IMATH);
+}
+
 /* Lowers FMOV to ADD #0, since FMOV doesn't exist on the h/w and this is the
  * latest time it's sane to lower (it's useful to distinguish before, but we'll
  * need this handle during scheduling to ensure the ports get modeled
@@ -159,6 +167,7 @@ bi_schedule(bi_context *ctx)
 
                         can_fma &= !bi_ambiguous_abs(ins);
                         can_fma &= !bi_icmp(ins);
+                        can_fma &= !bi_imath_small(ins);
 
                         assert(can_fma || can_add);